Changeset c621f4aa in mainline for uspace/lib/c/arch/sparc64


Ignore:
Timestamp:
2010-07-25T10:11:13Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
377cce8
Parents:
24a2517 (diff), a2da43c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge with mainline.

Location:
uspace/lib/c/arch/sparc64
Files:
2 added
21 moved

Legend:

Unmodified
Added
Removed
  • uspace/lib/c/arch/sparc64/_link.ld.in

    r24a2517 rc621f4aa  
    1 STARTUP(LIBC_PREFIX/arch/UARCH/src/entry.o)
     1STARTUP(LIBC_PATH/arch/UARCH/src/entry.o)
    22ENTRY(__entry)
    33
  • uspace/lib/c/arch/sparc64/include/atomic.h

    r24a2517 rc621f4aa  
    4646 *
    4747 * @param val Atomic variable.
    48  * @param i Signed value to be added.
     48 * @param i   Signed value to be added.
    4949 *
    5050 * @return Value of the atomic variable as it existed before addition.
     51 *
    5152 */
    52 static inline long atomic_add(atomic_t *val, int i)
     53static inline atomic_count_t atomic_add(atomic_t *val, atomic_count_t i)
    5354{
    54         uint64_t a, b;
    55 
     55        atomic_count_t a;
     56        atomic_count_t b;
     57       
    5658        do {
    57                 volatile uintptr_t x = (uint64_t) &val->count;
    58 
    59                 a = *((uint64_t *) x);
     59                volatile uintptr_t ptr = (uintptr_t) &val->count;
     60               
     61                a = *((atomic_count_t *) ptr);
    6062                b = a + i;
    61                 asm volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *)x)), "+r" (b) : "r" (a));
     63               
     64                asm volatile (
     65                        "casx %0, %2, %1\n"
     66                        : "+m" (*((atomic_count_t *) ptr)),
     67                          "+r" (b)
     68                        : "r" (a)
     69                );
    6270        } while (a != b);
    63 
     71       
    6472        return a;
    6573}
    6674
    67 static inline long atomic_preinc(atomic_t *val)
     75static inline atomic_count_t atomic_preinc(atomic_t *val)
    6876{
    6977        return atomic_add(val, 1) + 1;
    7078}
    7179
    72 static inline long atomic_postinc(atomic_t *val)
     80static inline atomic_count_t atomic_postinc(atomic_t *val)
    7381{
    7482        return atomic_add(val, 1);
    7583}
    7684
    77 static inline long atomic_predec(atomic_t *val)
     85static inline atomic_count_t atomic_predec(atomic_t *val)
    7886{
    7987        return atomic_add(val, -1) - 1;
    8088}
    8189
    82 static inline long atomic_postdec(atomic_t *val)
     90static inline atomic_count_t atomic_postdec(atomic_t *val)
    8391{
    8492        return atomic_add(val, -1);
  • uspace/lib/c/arch/sparc64/include/config.h

    r24a2517 rc621f4aa  
    3636#define LIBC_sparc64_CONFIG_H_
    3737
     38#if defined (SUN4U)
    3839#define PAGE_WIDTH      14
     40#elif defined(SUN4V)
     41#define PAGE_WIDTH      13
     42#endif
     43
    3944#define PAGE_SIZE       (1 << PAGE_WIDTH)
    4045
  • uspace/lib/c/arch/sparc64/include/ddi.h

    r24a2517 rc621f4aa  
    3737#include <libarch/types.h>
    3838
    39 static inline memory_barrier(void)
     39static inline void memory_barrier(void)
    4040{
    41         asm volatile ("membar #LoadLoad | #StoreStore\n" ::: "memory");
     41        asm volatile (
     42                "membar #LoadLoad | #StoreStore\n"
     43                ::: "memory"
     44        );
    4245}
    4346
  • uspace/lib/c/arch/sparc64/include/fibril.h

    r24a2517 rc621f4aa  
    4848                    STACK_ALIGNMENT) - (STACK_BIAS + SP_DELTA); \
    4949                (c)->fp = -STACK_BIAS; \
    50                 (c)->tp = ptls; \
     50                (c)->tp = (uint64_t) ptls; \
    5151        } while (0)
    5252       
  • uspace/lib/c/arch/sparc64/include/types.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup libcsparc64     
     29/** @addtogroup libcsparc64
    3030 * @{
    3131 */
     
    3838#define __64_BITS__
    3939
    40 typedef unsigned long sysarg_t;
     40#include <libarch/common.h>
    4141
    42 typedef signed char int8_t;
    43 typedef short int int16_t;
    44 typedef int int32_t;
    45 typedef long int int64_t;
     42#define SIZE_MIN  UINT64_MIN
     43#define SIZE_MAX  UINT64_MAX
    4644
    47 typedef unsigned char uint8_t;
    48 typedef unsigned short int uint16_t;
    49 typedef unsigned int uint32_t;
    50 typedef unsigned long int uint64_t;
     45#define SSIZE_MIN  INT64_MIN
     46#define SSIZE_MAX  INT64_MAX
     47
     48typedef uint64_t sysarg_t;
    5149
    5250typedef int64_t ssize_t;
     
    5452
    5553typedef uint64_t uintptr_t;
     54typedef uint64_t atomic_count_t;
     55typedef int64_t atomic_signed_t;
    5656
    5757#endif
  • uspace/lib/c/arch/sparc64/src/thread_entry.s

    r24a2517 rc621f4aa  
    4242        add %g0, -0x7ff, %fp
    4343
     44        #
     45        # Propagate the input arguments to the new window.
     46        #
     47        mov %i0, %o0
     48
    4449        sethi %hi(_gp), %l7
    4550        call __thread_main              ! %o0 contains address of uarg
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