Changeset c621f4aa in mainline for kernel/arch/arm32


Ignore:
Timestamp:
2010-07-25T10:11:13Z (16 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
377cce8
Parents:
24a2517 (diff), a2da43c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge with mainline.

Location:
kernel/arch/arm32
Files:
2 added
41 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/arm32/Makefile.inc

    r24a2517 rc621f4aa  
    2727#
    2828
    29 ## Toolchain configuration
    30 #
    31 
    3229BFD_NAME = elf32-littlearm
    3330BFD_ARCH = arm
    3431BFD = binary
    35 TARGET = arm-linux-gnu
    36 TOOLCHAIN_DIR = $(CROSS_PREFIX)/arm32
    3732
    3833ATSIGN = %
    … …  
    5146        arch/$(KARCH)/src/context.S \
    5247        arch/$(KARCH)/src/dummy.S \
    53         arch/$(KARCH)/src/panic.S \
    5448        arch/$(KARCH)/src/cpu/cpu.c \
    5549        arch/$(KARCH)/src/ddi/ddi.c \
    … …  
    6660        arch/$(KARCH)/src/ras.c
    6761
     62ifeq ($(MACHINE),gta02)
     63        ARCH_SOURCES += arch/$(KARCH)/src/mach/gta02/gta02.c
     64endif
     65
    6866ifeq ($(MACHINE),testarm)
    6967        ARCH_SOURCES += arch/$(KARCH)/src/mach/testarm/testarm.c

  • kernel/arch/arm32/_link.ld.in

    r24a2517 rc621f4aa  
    77 */
    88
    9 #define KERNEL_LOAD_ADDRESS 0x80200000
     9#ifdef MACHINE_gta02
     10#define KERNEL_LOAD_ADDRESS 0xb0a08000
     11#else
     12#define KERNEL_LOAD_ADDRESS 0x80a00000
     13#endif
    1014
    1115OUTPUT_ARCH(arm)

  • kernel/arch/arm32/include/arch.h

    r24a2517 rc621f4aa  
    4545
    4646typedef struct {
    47         uintptr_t addr;
    48         uint32_t size;
     47        void *addr;
     48        size_t size;
    4949        char name[BOOTINFO_TASK_NAME_BUFLEN];
    5050} utask_t;
    5151
    5252typedef struct {
    53         uint32_t cnt;
     53        size_t cnt;
    5454        utask_t tasks[TASKMAP_MAX_RECORDS];
    5555} bootinfo_t;

  • kernel/arch/arm32/include/asm.h

    r24a2517 rc621f4aa  
    3838
    3939#include <typedefs.h>
    40 #include <arch/types.h>
    4140#include <arch/stack.h>
    4241#include <config.h>
    4342#include <arch/interrupt.h>
     43#include <trace.h>
    4444
    4545/** No such instruction on ARM to sleep CPU. */
    46 static inline void cpu_sleep(void)
     46NO_TRACE static inline void cpu_sleep(void)
    4747{
    4848}
    4949
    50 static inline void pio_write_8(ioport8_t *port, uint8_t v)
     50NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
    5151{
    5252        *port = v;
    5353}
    5454
    55 static inline void pio_write_16(ioport16_t *port, uint16_t v)
     55NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
    5656{
    5757        *port = v;
    5858}
    5959
    60 static inline void pio_write_32(ioport32_t *port, uint32_t v)
     60NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
    6161{
    6262        *port = v;
    6363}
    6464
    65 static inline uint8_t pio_read_8(ioport8_t *port)
     65NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    6666{
    6767        return *port;
    6868}
    6969
    70 static inline uint16_t pio_read_16(ioport16_t *port)
     70NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    7171{
    7272        return *port;
    7373}
    7474
    75 static inline uint32_t pio_read_32(ioport32_t *port)
     75NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    7676{
    7777        return *port;
    … …  
    8585 *
    8686 */
    87 static inline uintptr_t get_stack_base(void)
     87NO_TRACE static inline uintptr_t get_stack_base(void)
    8888{
    8989        uintptr_t v;
     90       
    9091        asm volatile (
    9192                "and %[v], sp, %[size]\n"
    … …  
    9394                : [size] "r" (~(STACK_SIZE - 1))
    9495        );
     96       
    9597        return v;
    9698}

  • kernel/arch/arm32/include/atomic.h

    r24a2517 rc621f4aa  
    3838
    3939#include <arch/asm.h>
     40#include <trace.h>
    4041
    4142/** Atomic addition.
    … …  
    4748 *
    4849 */
    49 static inline long atomic_add(atomic_t *val, int i)
     50NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val,
     51    atomic_count_t i)
    5052{
    51         long ret;
    52 
    5353        /*
    5454         * This implementation is for UP pre-ARMv6 systems where we do not have
    … …  
    5757        ipl_t ipl = interrupts_disable();
    5858        val->count += i;
    59         ret = val->count;
     59        atomic_count_t ret = val->count;
    6060        interrupts_restore(ipl);
    6161       
    … …  
    6666 *
    6767 * @param val Variable to be incremented.
     68 *
    6869 */
    69 static inline void atomic_inc(atomic_t *val)
     70NO_TRACE static inline void atomic_inc(atomic_t *val)
    7071{
    7172        atomic_add(val, 1);
    … …  
    7576 *
    7677 * @param val Variable to be decremented.
     78 *
    7779 */
    78 static inline void atomic_dec(atomic_t *val) {
     80NO_TRACE static inline void atomic_dec(atomic_t *val) {
    7981        atomic_add(val, -1);
    8082}
    … …  
    8486 * @param val Variable to be incremented.
    8587 * @return    Value after incrementation.
     88 *
    8689 */
    87 static inline long atomic_preinc(atomic_t *val)
     90NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val)
    8891{
    8992        return atomic_add(val, 1);
    … …  
    9497 * @param val Variable to be decremented.
    9598 * @return    Value after decrementation.
     99 *
    96100 */
    97 static inline long atomic_predec(atomic_t *val)
     101NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val)
    98102{
    99103        return atomic_add(val, -1);
    … …  
    104108 * @param val Variable to be incremented.
    105109 * @return    Value before incrementation.
     110 *
    106111 */
    107 static inline long atomic_postinc(atomic_t *val)
     112NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val)
    108113{
    109114        return atomic_add(val, 1) - 1;
    … …  
    114119 * @param val Variable to be decremented.
    115120 * @return    Value before decrementation.
     121 *
    116122 */
    117 static inline long atomic_postdec(atomic_t *val)
     123NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val)
    118124{
    119125        return atomic_add(val, -1) + 1;

  • kernel/arch/arm32/include/context.h

    r24a2517 rc621f4aa  
    5252#ifndef __ASM__
    5353
    54 #include <arch/types.h>
     54#include <typedefs.h>
    5555
    5656/** Thread context containing registers that must be preserved across function

  • kernel/arch/arm32/include/cpu.h

    r24a2517 rc621f4aa  
    3737#define KERN_arm32_CPU_H_
    3838
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040#include <arch/asm.h>
    4141

  • kernel/arch/arm32/include/cycle.h

    r24a2517 rc621f4aa  
    3737#define KERN_arm32_CYCLE_H_
    3838
    39 /** Returns count of CPU cycles.
     39#include <trace.h>
     40
     41/** Return count of CPU cycles.
    4042 *
    41  *  No such instruction on ARM to get count of cycles.
     43 * No such instruction on ARM to get count of cycles.
    4244 *
    43  *  @return Count of CPU cycles.
     45 * @return Count of CPU cycles.
     46 *
    4447 */
    45 static inline uint64_t get_cycle(void)
     48NO_TRACE static inline uint64_t get_cycle(void)
    4649{
    4750        return 0;

  • kernel/arch/arm32/include/exception.h

    r24a2517 rc621f4aa  
    2828 */
    2929
    30 /** @addtogroup arm32   
     30/** @addtogroup arm32
    3131 * @{
    3232 */
    … …  
    3838#define KERN_arm32_EXCEPTION_H_
    3939
    40 #include <arch/types.h>
     40#include <typedefs.h>
    4141#include <arch/regutils.h>
     42#include <trace.h>
    4243
    4344/** If defined, forces using of high exception vectors. */
    … …  
    4546
    4647#ifdef HIGH_EXCEPTION_VECTORS
    47         #define EXC_BASE_ADDRESS        0xffff0000
     48        #define EXC_BASE_ADDRESS  0xffff0000
    4849#else
    49         #define EXC_BASE_ADDRESS        0x0
     50        #define EXC_BASE_ADDRESS  0x0
    5051#endif
    5152
    5253/* Exception Vectors */
    53 #define EXC_RESET_VEC          (EXC_BASE_ADDRESS + 0x0)
    54 #define EXC_UNDEF_INSTR_VEC    (EXC_BASE_ADDRESS + 0x4)
    55 #define EXC_SWI_VEC            (EXC_BASE_ADDRESS + 0x8)
    56 #define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
    57 #define EXC_DATA_ABORT_VEC     (EXC_BASE_ADDRESS + 0x10)
    58 #define EXC_IRQ_VEC            (EXC_BASE_ADDRESS + 0x18)
    59 #define EXC_FIQ_VEC            (EXC_BASE_ADDRESS + 0x1c)
     54#define EXC_RESET_VEC           (EXC_BASE_ADDRESS + 0x0)
     55#define EXC_UNDEF_INSTR_VEC     (EXC_BASE_ADDRESS + 0x4)
     56#define EXC_SWI_VEC             (EXC_BASE_ADDRESS + 0x8)
     57#define EXC_PREFETCH_ABORT_VEC  (EXC_BASE_ADDRESS + 0xc)
     58#define EXC_DATA_ABORT_VEC      (EXC_BASE_ADDRESS + 0x10)
     59#define EXC_IRQ_VEC             (EXC_BASE_ADDRESS + 0x18)
     60#define EXC_FIQ_VEC             (EXC_BASE_ADDRESS + 0x1c)
    6061
    6162/* Exception numbers */
    … …  
    6869#define EXC_FIQ             6
    6970
    70 
    7171/** Kernel stack pointer.
    7272 *
    7373 * It is set when thread switches to user mode,
    7474 * and then used for exception handling.
     75 *
    7576 */
    7677extern uintptr_t supervisor_sp;
    77 
    7878
    7979/** Temporary exception stack pointer.
    … …  
    8181 * Temporary stack is used in exceptions handling routines
    8282 * before switching to thread's kernel stack.
     83 *
    8384 */
    8485extern uintptr_t exc_stack;
    85 
    8686
    8787/** Struct representing CPU state saved when an exception occurs. */
    … …  
    9090        uint32_t sp;
    9191        uint32_t lr;
    92 
     92       
    9393        uint32_t r0;
    9494        uint32_t r1;
    … …  
    104104        uint32_t fp;
    105105        uint32_t r12;
    106 
     106       
    107107        uint32_t pc;
    108108} istate_t;
    109109
    110 
    111 /** Sets Program Counter member of given istate structure.
     110/** Set Program Counter member of given istate structure.
    112111 *
    113  * @param istate istate structure
     112 * @param istate  istate structure
    114113 * @param retaddr new value of istate's PC member
     114 *
    115115 */
    116 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
     116NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
     117    uintptr_t retaddr)
    117118{
    118         istate->pc = retaddr;
     119        istate->pc = retaddr;
    119120}
    120121
    121 
    122 /** Returns true if exception happened while in userspace. */
    123 static inline int istate_from_uspace(istate_t *istate)
     122/** Return true if exception happened while in userspace. */
     123NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    124124{
    125         return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
     125        return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
    126126}
    127127
    128 
    129 /** Returns Program Counter member of given istate structure. */
    130 static inline unative_t istate_get_pc(istate_t *istate)
     128/** Return Program Counter member of given istate structure. */
     129NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
    131130{
    132         return istate->pc;
     131        return istate->pc;
    133132}
    134133
    135 static inline unative_t istate_get_fp(istate_t *istate)
     134NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
    136135{
    137136        return istate->fp;
    138137}
    139138
    140 
    141139extern void install_exception_handlers(void);
    142140extern void exception_init(void);
    143 extern void print_istate(istate_t *istate);
    144141extern void reset_exception_entry(void);
    145142extern void irq_exception_entry(void);
    … …  
    150147extern void swi_exception_entry(void);
    151148
    152 
    153149#endif
    154150

  • kernel/arch/arm32/include/faddr.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32   
     29/** @addtogroup arm32
    3030 * @{
    3131 */
    … …  
    3737#define KERN_arm32_FADDR_H_
    3838
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040
    4141/** Calculate absolute address of function referenced by fptr pointer.
    4242 *
    4343 * @param fptr Function pointer.
     44 *
    4445 */
    45 #define FADDR(fptr)             ((uintptr_t) (fptr))
     46#define FADDR(fptr)  ((uintptr_t) (fptr))
    4647
    4748#endif

  • kernel/arch/arm32/include/fpu_context.h

    r24a2517 rc621f4aa  
    3939#define KERN_arm32_FPU_CONTEXT_H_
    4040
    41 #include <arch/types.h>
     41#include <typedefs.h>
    4242
    4343#define FPU_CONTEXT_ALIGN    0

  • kernel/arch/arm32/include/interrupt.h

    r24a2517 rc621f4aa  
    3737#define KERN_arm32_INTERRUPT_H_
    3838
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040#include <arch/exception.h>
    4141
    4242/** Initial size of exception dispatch table. */
    43 #define IVT_ITEMS       6
     43#define IVT_ITEMS  6
    4444
    4545/** Index of the first item in exception dispatch table. */
    46 #define IVT_FIRST       0
    47 
     46#define IVT_FIRST  0
    4847
    4948extern void interrupt_init(void);
    … …  
    5251extern void interrupts_restore(ipl_t ipl);
    5352extern ipl_t interrupts_read(void);
    54 
     53extern bool interrupts_disabled(void);
    5554
    5655#endif

  • kernel/arch/arm32/include/mach/integratorcp/integratorcp.h

    r24a2517 rc621f4aa  
    3636 */
    3737
    38 #ifndef KERN_arm32_MACHINE_H_
    39 #define KERN_arm32_MACHINE_H_
     38#ifndef KERN_arm32_icp_H_
     39#define KERN_arm32_icp_H_
    4040
    4141#include <arch/machine_func.h>
    … …  
    102102extern void icp_timer_irq_start(void);
    103103extern void icp_cpu_halt(void);
    104 extern void icp_irq_exception(int exc_no, istate_t *istate);
    105 extern uintptr_t icp_get_memory_size(void);
     104extern void icp_irq_exception(unsigned int, istate_t *);
     105extern void icp_get_memory_extents(uintptr_t *, uintptr_t *);
    106106extern void icp_frame_init(void);
     107
     108extern struct arm_machine_ops icp_machine_ops;
     109
     110/** Size of IntegratorCP IRQ number range (starting from 0) */
     111#define ICP_IRQ_COUNT 8
    107112
    108113#endif

  • kernel/arch/arm32/include/mach/testarm/testarm.h

    r24a2517 rc621f4aa  
    3737 */
    3838
    39 #ifndef KERN_arm32_MACHINE_H_
    40 #define KERN_arm32_MACHINE_H_
     39#ifndef KERN_arm32_testarm_H_
     40#define KERN_arm32_testarm_H_
    4141
    4242#include <arch/machine_func.h>
    4343
    44 /** Last interrupt number (beginning from 0) whose status is probed
    45  * from interrupt controller
    46  */
    47 #define GXEMUL_IRQC_MAX_IRQ  8
    48 #define GXEMUL_KBD_IRQ       2
    49 #define GXEMUL_TIMER_IRQ     4
     44/** Size of GXemul IRQ number range (starting from 0) */
     45#define GXEMUL_IRQ_COUNT        32
     46#define GXEMUL_KBD_IRQ          2
     47#define GXEMUL_TIMER_IRQ        4
    5048
    5149/** Timer frequency */
    … …  
    7270extern void gxemul_timer_irq_start(void);
    7371extern void gxemul_cpu_halt(void);
    74 extern void gxemul_irq_exception(int exc_no, istate_t *istate);
    75 extern uintptr_t gxemul_get_memory_size(void);
     72extern void gxemul_irq_exception(unsigned int, istate_t *);
     73extern void gxemul_get_memory_extents(uintptr_t *, uintptr_t *);
    7674extern void gxemul_frame_init(void);
    7775
     76extern struct arm_machine_ops gxemul_machine_ops;
    7877
    7978#endif

  • kernel/arch/arm32/include/machine_func.h

    r24a2517 rc621f4aa  
    4343
    4444#include <console/console.h>
    45 #include <arch/types.h>
     45#include <typedefs.h>
    4646#include <arch/exception.h>
    4747
    48 #define MACHINE_GENFUNC machine_genfunc
    49 
    5048struct arm_machine_ops {
    51         void            (*machine_init)(void);
    52         void            (*machine_timer_irq_start)(void);
    53         void            (*machine_cpu_halt)(void);
    54         uintptr_t       (*machine_get_memory_size)(void);
    55         void            (*machine_irq_exception)(int, istate_t*);
    56         void            (*machine_frame_init)(void);
    57         void            (*machine_output_init)(void);
    58         void            (*machine_input_init)(void);
     49        void (*machine_init)(void);
     50        void (*machine_timer_irq_start)(void);
     51        void (*machine_cpu_halt)(void);
     52        void (*machine_get_memory_extents)(uintptr_t *, uintptr_t *);
     53        void (*machine_irq_exception)(unsigned int, istate_t *);
     54        void (*machine_frame_init)(void);
     55        void (*machine_output_init)(void);
     56        void (*machine_input_init)(void);
    5957};
    6058
    61 extern struct arm_machine_ops machine_ops;
     59/** Pointer to arm_machine_ops structure being used. */
     60extern struct arm_machine_ops *machine_ops;
    6261
     62/** Initialize machine_ops pointer. */
     63extern void machine_ops_init(void);
    6364
    6465/** Maps HW devices to the kernel address space using #hw_map. */
    … …  
    7374extern void machine_cpu_halt(void);
    7475
    75 
    76 /** Returns size of available memory.
     76/** Get extents of available memory.
    7777 *
    78  *  @return Size of available memory.
     78 * @param start         Place to store memory start address.
     79 * @param size          Place to store memory size.
    7980 */
    80 extern uintptr_t machine_get_memory_size(void);
    81 
     81extern void machine_get_memory_extents(uintptr_t *start, uintptr_t *size);
    8282
    8383/** Interrupt exception handler.
    … …  
    8686 * @param istate Saved processor state.
    8787 */
    88 extern void machine_irq_exception(int exc_no, istate_t *istate);
     88extern void machine_irq_exception(unsigned int exc_no, istate_t *istate);
    8989
    9090
    … …  
    104104extern void machine_input_init(void);
    105105
    106 extern void machine_genfunc(void);
     106extern size_t machine_get_irq_count(void);
     107
    107108#endif
    108109

  • kernel/arch/arm32/include/memstr.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32   
     29/** @addtogroup arm32
    3030 * @{
    3131 */
    … …  
    3939#define memcpy(dst, src, cnt)  __builtin_memcpy((dst), (src), (cnt))
    4040
    41 extern void memsetw(void *dst, size_t cnt, uint16_t x);
    42 extern void memsetb(void *dst, size_t cnt, uint8_t x);
    43 
    44 extern int memcmp(const void *a, const void *b, size_t cnt);
     41extern void memsetw(void *, size_t, uint16_t);
     42extern void memsetb(void *, size_t, uint8_t);
    4543
    4644#endif

  • kernel/arch/arm32/include/mm/asid.h

    r24a2517 rc621f4aa  
    3939#define KERN_arm32_ASID_H_
    4040
    41 #include <arch/types.h>
     41#include <typedefs.h>
    4242
    4343#define ASID_MAX_ARCH           3       /* minimal required number */

  • kernel/arch/arm32/include/mm/frame.h

    r24a2517 rc621f4aa  
    4343#ifndef __ASM__
    4444
    45 #include <arch/types.h>
     45#include <typedefs.h>
    4646
    4747#define BOOT_PAGE_TABLE_SIZE     0x4000
    48 #define BOOT_PAGE_TABLE_ADDRESS  0x4000
     48
     49#ifdef MACHINE_gta02
     50#define BOOT_PAGE_TABLE_ADDRESS  0x30010000
     51#else
     52#define BOOT_PAGE_TABLE_ADDRESS  0x00008000
     53#endif
    4954
    5055#define BOOT_PAGE_TABLE_START_FRAME     (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH)
    5156#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES  (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH)
     57
     58#ifdef MACHINE_gta02
     59#define PHYSMEM_START_ADDR      0x30008000
     60#else
     61#define PHYSMEM_START_ADDR      0x00000000
     62#endif
    5263
    5364extern uintptr_t last_frame;

  • kernel/arch/arm32/include/mm/page.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32mm 
     29/** @addtogroup arm32mm
    3030 * @{
    3131 */
    … …  
    4040#include <mm/mm.h>
    4141#include <arch/exception.h>
     42#include <trace.h>
    4243
    4344#define PAGE_WIDTH      FRAME_WIDTH
    … …  
    192193/** Sets the address of level 0 page table.
    193194 *
    194  * @param pt    Pointer to the page table to set.
    195  */   
    196 static inline void set_ptl0_addr(pte_t *pt)
     195 * @param pt Pointer to the page table to set.
     196 *
     197 */
     198NO_TRACE static inline void set_ptl0_addr(pte_t *pt)
    197199{
    198200        asm volatile (
    … …  
    205207/** Returns level 0 page table entry flags.
    206208 *
    207  *  @param pt     Level 0 page table.
    208  *  @param i      Index of the entry to return.
    209  */
    210 static inline int get_pt_level0_flags(pte_t *pt, size_t i)
     209 * @param pt Level 0 page table.
     210 * @param i  Index of the entry to return.
     211 *
     212 */
     213NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i)
    211214{
    212215        pte_level0_t *p = &pt[i].l0;
    213216        int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
    214 
     217       
    215218        return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
    216219            (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
    … …  
    220223/** Returns level 1 page table entry flags.
    221224 *
    222  *  @param pt     Level 1 page table.
    223  *  @param i      Index of the entry to return.
    224  */
    225 static inline int get_pt_level1_flags(pte_t *pt, size_t i)
     225 * @param pt Level 1 page table.
     226 * @param i  Index of the entry to return.
     227 *
     228 */
     229NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i)
    226230{
    227231        pte_level1_t *p = &pt[i].l1;
    228 
     232       
    229233        int dt = p->descriptor_type;
    230234        int ap = p->access_permission_0;
    231 
     235       
    232236        return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
    233237            ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) |
    … …  
    241245}
    242246
    243 
    244247/** Sets flags of level 0 page table entry.
    245248 *
    246  *  @param pt     level 0 page table
    247  *  @param i      index of the entry to be changed
    248  *  @param flags  new flags
    249  */
    250 static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags)
     249 * @param pt    level 0 page table
     250 * @param i     index of the entry to be changed
     251 * @param flags new flags
     252 *
     253 */
     254NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags)
    251255{
    252256        pte_level0_t *p = &pt[i].l0;
    253 
     257       
    254258        if (flags & PAGE_NOT_PRESENT) {
    255259                p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
    … …  
    262266                p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE;
    263267                p->should_be_zero = 0;
    264     }
     268        }
    265269}
    266270
    … …  
    268272/** Sets flags of level 1 page table entry.
    269273 *
    270  *  We use same access rights for the whole page. When page is not preset we
    271  *  store 1 in acess_rigts_3 so that at least one bit is 1 (to mark correct
    272  *  page entry, see #PAGE_VALID_ARCH).
    273  *
    274  *  @param pt     Level 1 page table.
    275  *  @param i      Index of the entry to be changed.
    276  *  @param flags  New flags.
    277  */ 
    278 static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags)
     274 * We use same access rights for the whole page. When page
     275 * is not preset we store 1 in acess_rigts_3 so that at least
     276 * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH).
     277 *
     278 * @param pt    Level 1 page table.
     279 * @param i     Index of the entry to be changed.
     280 * @param flags New flags.
     281 *
     282 */
     283NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags)
    279284{
    280285        pte_level1_t *p = &pt[i].l1;
    … …  
    287292                p->access_permission_3 = p->access_permission_0;
    288293        }
    289  
     294       
    290295        p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
    291 
     296       
    292297        /* default access permission */
    293298        p->access_permission_0 = p->access_permission_1 =
    294299            p->access_permission_2 = p->access_permission_3 =
    295300            PTE_AP_USER_NO_KERNEL_RW;
    296 
     301       
    297302        if (flags & PAGE_USER)  {
    298303                if (flags & PAGE_READ) {

  • kernel/arch/arm32/include/mm/page_fault.h

    r24a2517 rc621f4aa  
    3737#define KERN_arm32_PAGE_FAULT_H_
    3838
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040
    4141
    … …  
    8181} instruction_union_t;
    8282
    83 extern void prefetch_abort(int n, istate_t *istate);
    84 extern void data_abort(int n, istate_t *istate);
     83extern void prefetch_abort(unsigned int, istate_t *);
     84extern void data_abort(unsigned int, istate_t *);
    8585
    8686#endif

  • kernel/arch/arm32/include/mm/tlb.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32mm 
     29/** @addtogroup arm32mm
    3030 * @{
    3131 */

  • kernel/arch/arm32/include/ras.h

    r24a2517 rc621f4aa  
    11/*
    2  * Copyright (c) 2009 Jakub Jermar 
     2 * Copyright (c) 2009 Jakub Jermar
    33 * All rights reserved.
    44 *
    … …  
    3838
    3939#include <arch/exception.h>
    40 #include <arch/types.h>
     40#include <typedefs.h>
    4141
    42 #define RAS_START       0
    43 #define RAS_END         1
     42#define RAS_START  0
     43#define RAS_END    1
    4444
    4545extern uintptr_t *ras_page;
    4646
    4747extern void ras_init(void);
    48 extern void ras_check(int, istate_t *);
     48extern void ras_check(unsigned int, istate_t *);
    4949
    5050#endif

  • kernel/arch/arm32/include/types.h

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32   
     29/** @addtogroup arm32
    3030 * @{
    3131 */
    … …  
    3838
    3939#ifndef DOXYGEN
    40 #       define ATTRIBUTE_PACKED __attribute__ ((packed))
     40        #define ATTRIBUTE_PACKED __attribute__((packed))
    4141#else
    42 #       define ATTRIBUTE_PACKED
     42        #define ATTRIBUTE_PACKED
    4343#endif
    44 
    45 typedef signed char int8_t;
    46 typedef signed short int16_t;
    47 typedef signed long int32_t;
    48 typedef signed long long int64_t;
    49 
    50 typedef unsigned char uint8_t;
    51 typedef unsigned short uint16_t;
    52 typedef unsigned long uint32_t;
    53 typedef unsigned long long uint64_t;
    5444
    5545typedef uint32_t size_t;
    … …  
    6252typedef uint32_t unative_t;
    6353typedef int32_t native_t;
     54typedef uint32_t atomic_count_t;
    6455
    6556typedef struct {
    6657} fncptr_t;
    6758
    68 #define PRIp "x"        /**< Format for uintptr_t. */
    69 #define PRIs "u"        /**< Format for size_t. */
     59#define PRIp "x"  /**< Format for uintptr_t. */
     60#define PRIs "u"  /**< Format for size_t. */
    7061
    71 #define PRId8 "d"       /**< Format for int8_t. */
    72 #define PRId16 "d"      /**< Format for int16_t. */
    73 #define PRId32 "d"      /**< Format for int32_t. */
    74 #define PRId64 "lld"    /**< Format for int64_t. */
    75 #define PRIdn "d"       /**< Format for native_t. */
     62#define PRId8 "d"     /**< Format for int8_t. */
     63#define PRId16 "d"    /**< Format for int16_t. */
     64#define PRId32 "d"    /**< Format for int32_t. */
     65#define PRId64 "lld"  /**< Format for int64_t. */
     66#define PRIdn "d"     /**< Format for native_t. */
    7667
    77 #define PRIu8 "u"       /**< Format for uint8_t. */
    78 #define PRIu16 "u"      /**< Format for uint16_t. */
    79 #define PRIu32 "u"      /**< Format for uint32_t. */
    80 #define PRIu64 "llu"    /**< Format for uint64_t. */
    81 #define PRIun "u"       /**< Format for unative_t. */
     68#define PRIu8 "u"     /**< Format for uint8_t. */
     69#define PRIu16 "u"    /**< Format for uint16_t. */
     70#define PRIu32 "u"    /**< Format for uint32_t. */
     71#define PRIu64 "llu"  /**< Format for uint64_t. */
     72#define PRIun "u"     /**< Format for unative_t. */
    8273
    83 #define PRIx8 "x"       /**< Format for hexadecimal (u)int8_t. */
    84 #define PRIx16 "x"      /**< Format for hexadecimal (u)int16_t. */
    85 #define PRIx32 "x"      /**< Format for hexadecimal (u)uint32_t. */
    86 #define PRIx64 "llx"    /**< Format for hexadecimal (u)int64_t. */
    87 #define PRIxn "x"       /**< Format for hexadecimal (u)native_t. */
     74#define PRIx8 "x"     /**< Format for hexadecimal (u)int8_t. */
     75#define PRIx16 "x"    /**< Format for hexadecimal (u)int16_t. */
     76#define PRIx32 "x"    /**< Format for hexadecimal (u)uint32_t. */
     77#define PRIx64 "llx"  /**< Format for hexadecimal (u)int64_t. */
     78#define PRIxn "x"     /**< Format for hexadecimal (u)native_t. */
    8879
    8980#endif

  • kernel/arch/arm32/src/arm32.c

    r24a2517 rc621f4aa  
    4545#include <interrupt.h>
    4646#include <arch/regutils.h>
     47#include <arch/machine_func.h>
    4748#include <userspace.h>
    4849#include <macros.h>
    49 #include <string.h>
     50#include <str.h>
    5051#include <arch/ras.h>
    51 
    52 #ifdef MACHINE_testarm
    53         #include <arch/mach/testarm/testarm.h>
    54 #endif
    55 
    56 #ifdef MACHINE_integratorcp
    57         #include <arch/mach/integratorcp/integratorcp.h>
    58 #endif
    59 
    6052
    6153/** Performs arm32-specific initialization before main_bsp() is called. */
    6254void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
    6355{
    64         unsigned int i;
     56        init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
    6557       
    66         init.cnt = bootinfo->cnt;
    67        
    68         for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); ++i) {
    69                 init.tasks[i].addr = bootinfo->tasks[i].addr;
     58        size_t i;
     59        for (i = 0; i < init.cnt; i++) {
     60                init.tasks[i].addr = (uintptr_t) bootinfo->tasks[i].addr;
    7061                init.tasks[i].size = bootinfo->tasks[i].size;
    7162                str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
    7263                    bootinfo->tasks[i].name);
    7364        }
     65
     66        /* Initialize machine_ops pointer. */
     67        machine_ops_init();
    7468}
    7569

  • kernel/arch/arm32/src/asm.S

    r24a2517 rc621f4aa  
    1 #
    2 # Copyright (c) 2007 Michal Kebrt
    3 # All rights reserved.
    4 #
    5 # Redistribution and use in source and binary forms, with or without
    6 # modification, are permitted provided that the following conditions
    7 # are met:
    8 #
    9 # - Redistributions of source code must retain the above copyright
    10 #   notice, this list of conditions and the following disclaimer.
    11 # - Redistributions in binary form must reproduce the above copyright
    12 #   notice, this list of conditions and the following disclaimer in the
    13 #   documentation and/or other materials provided with the distribution.
    14 # - The name of the author may not be used to endorse or promote products
    15 #   derived from this software without specific prior written permission.
    16 #
    17 # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
    18 # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
    19 # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
    20 # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
    21 # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
    22 # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    23 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    24 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    25 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
    26 # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    27 #
     1/*
     2 * Copyright (c) 2007 Michal Kebrt
     3 * All rights reserved.
     4 *
     5 * Redistribution and use in source and binary forms, with or without
     6 * modification, are permitted provided that the following conditions
     7 * are met:
     8 *
     9 * - Redistributions of source code must retain the above copyright
     10 *   notice, this list of conditions and the following disclaimer.
     11 * - Redistributions in binary form must reproduce the above copyright
     12 *   notice, this list of conditions and the following disclaimer in the
     13 *   documentation and/or other materials provided with the distribution.
     14 * - The name of the author may not be used to endorse or promote products
     15 *   derived from this software without specific prior written permission.
     16 *
     17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27 */
    2828
    29        
    3029.text
    3130
    … …  
    3736.global memcpy_from_uspace_failover_address
    3837.global memcpy_to_uspace_failover_address
     38.global early_putchar
    3939
    4040memsetb:
    … …  
    4747memcpy_from_uspace:
    4848memcpy_to_uspace:
    49         add     r3, r1, #3
    50         bic     r3, r3, #3
    51         cmp     r1, r3
    52         stmdb   sp!, {r4, r5, lr}
    53         mov     r5, r0                  /* save dst */
    54         beq     4f
    55 1:
    56         cmp     r2, #0
    57         movne   ip, #0
    58         beq     3f
    59 2:
    60         ldrb    r3, [ip, r1]
    61         strb    r3, [ip, r0]
    62         add     ip, ip, #1
    63         cmp     ip, r2
    64         bne     2b
    65 3:
    66         mov     r0, r5
    67         ldmia   sp!, {r4, r5, pc}
    68 4:
    69         add     r3, r0, #3
    70         bic     r3, r3, #3
    71         cmp     r0, r3
    72         bne     1b
    73         movs    r4, r2, lsr #2
    74         moveq   lr, r4
    75         beq     6f
    76         mov     lr, #0
    77         mov     ip, lr
    78 5:
    79         ldr     r3, [ip, r1]
    80         add     lr, lr, #1
    81         cmp     lr, r4
    82         str     r3, [ip, r0]
    83         add     ip, ip, #4
    84         bne     5b
    85 6:
    86         ands    r4, r2, #3
    87         beq     3b
    88         mov     r3, lr, lsl #2
    89         add     r0, r3, r0
    90         add     ip, r3, r1
    91         mov     r2, #0
    92 7:
    93         ldrb    r3, [r2, ip]
    94         strb    r3, [r2, r0]
    95         add     r2, r2, #1
    96         cmp     r2, r4
    97         bne     7b
    98         b       3b
     49        add r3, r1, #3
     50        bic r3, r3, #3
     51        cmp r1, r3
     52        stmdb sp!, {r4, r5, lr}
     53        mov r5, r0 /* save dst */
     54        beq 4f
     55       
     56        1:
     57                cmp r2, #0
     58                movne ip, #0
     59                beq 3f
     60       
     61        2:
     62                ldrb r3, [ip, r1]
     63                strb r3, [ip, r0]
     64                add ip, ip, #1
     65                cmp ip, r2
     66                bne 2b
     67       
     68        3:
     69                mov r0, r5
     70                ldmia sp!, {r4, r5, pc}
     71       
     72        4:
     73                add r3, r0, #3
     74                bic r3, r3, #3
     75                cmp r0, r3
     76                bne 1b
     77                movs r4, r2, lsr #2
     78                moveq lr, r4
     79                beq 6f
     80                mov lr, #0
     81                mov ip, lr
     82       
     83        5:
     84                ldr r3, [ip, r1]
     85                add lr, lr, #1
     86                cmp lr, r4
     87                str r3, [ip, r0]
     88                add ip, ip, #4
     89                bne 5b
     90       
     91        6:
     92                ands r4, r2, #3
     93                beq 3b
     94                mov r3, lr, lsl #2
     95                add r0, r3, r0
     96                add ip, r3, r1
     97                mov r2, #0
     98       
     99        7:
     100                ldrb r3, [r2, ip]
     101                strb r3, [r2, r0]
     102                add r2, r2, #1
     103                cmp r2, r4
     104                bne 7b
     105                b 3b
    99106
    100107memcpy_from_uspace_failover_address:
    101108memcpy_to_uspace_failover_address:
    102         mov     r0, #0
    103         ldmia   sp!, {r4, r5, pc}
     109        mov r0, #0
     110        ldmia sp!, {r4, r5, pc}
     111
     112early_putchar:
     113        mov pc, lr

  • kernel/arch/arm32/src/cpu/cpu.c

    r24a2517 rc621f4aa  
    4343
    4444/** Implementators (vendor) names */
    45 static char *imp_data[] = {
     45static const char *imp_data[] = {
    4646        "?",                                    /* IMP_DATA_START_OFFSET */
    4747        "ARM Ltd",                              /* 0x41 */
    … …  
    6060
    6161/** Architecture names */
    62 static char *arch_data[] = {
     62static const char *arch_data[] = {
    6363        "?",       /* 0x0 */
    6464        "4",       /* 0x1 */
    … …  
    108108void cpu_print_report(cpu_t *m)
    109109{
    110         char * vendor = imp_data[0];
    111         char * architecture = arch_data[0];
     110        const char *vendor = imp_data[0];
     111        const char *architecture = arch_data[0];
    112112        cpu_arch_t * cpu_arch = &m->arch;
    113113

  • kernel/arch/arm32/src/ddi/ddi.c

    r24a2517 rc621f4aa  
    3636#include <ddi/ddi.h>
    3737#include <proc/task.h>
    38 #include <arch/types.h>
     38#include <typedefs.h>
    3939
    4040/** Enable I/O space range for task.

  • kernel/arch/arm32/src/debug/stacktrace.c

    r24a2517 rc621f4aa  
    3535#include <stacktrace.h>
    3636#include <syscall/copy.h>
    37 #include <arch/types.h>
    3837#include <typedefs.h>
    3938
    … …  
    4140#define FRAME_OFFSET_RA         -1
    4241
    43 bool kernel_frame_pointer_validate(uintptr_t fp)
     42bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx)
    4443{
    45         return fp != 0;
     44        return ctx->fp != 0;
    4645}
    4746
    48 bool kernel_frame_pointer_prev(uintptr_t fp, uintptr_t *prev)
     47bool kernel_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
    4948{
    50         uint32_t *stack = (void *) fp;
     49        uint32_t *stack = (void *) ctx->fp;
    5150
    5251        *prev = stack[FRAME_OFFSET_FP_PREV];
    … …  
    5453}
    5554
    56 bool kernel_return_address_get(uintptr_t fp, uintptr_t *ra)
     55bool kernel_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
    5756{
    58         uint32_t *stack = (void *) fp;
     57        uint32_t *stack = (void *) ctx->fp;
    5958
    6059        *ra = stack[FRAME_OFFSET_RA];
    … …  
    6261}
    6362
    64 bool uspace_frame_pointer_validate(uintptr_t fp)
     63bool uspace_stack_trace_context_validate(stack_trace_context_t *ctx)
    6564{
    66         return fp != 0;
     65        return ctx->fp != 0;
    6766}
    6867
    69 bool uspace_frame_pointer_prev(uintptr_t fp, uintptr_t *prev)
     68bool uspace_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev)
    7069{
    7170        return !copy_from_uspace((void *) prev,
    72             (uint32_t *) fp + FRAME_OFFSET_FP_PREV, sizeof(*prev));
     71            (uint32_t *) ctx->fp + FRAME_OFFSET_FP_PREV, sizeof(*prev));
    7372}
    7473
    75 bool uspace_return_address_get(uintptr_t fp, uintptr_t *ra)
     74bool uspace_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra)
    7675{
    77         return !copy_from_uspace((void *) ra, (uint32_t *) fp + FRAME_OFFSET_RA,
    78             sizeof(*ra));
     76        return !copy_from_uspace((void *) ra,
     77            (uint32_t *) ctx->fp + FRAME_OFFSET_RA, sizeof(*ra));
    7978}
    8079

  • kernel/arch/arm32/src/dummy.S

    r24a2517 rc621f4aa  
    11#
    2 # Copyright (c) 2007 Michal Kebry, Pavel Jancik, Petr Stepan
     2# Copyright (c) 2007 Michal Kebrt, Pavel Jancik, Petr Stepan
    33# All rights reserved.
    44#

  • kernel/arch/arm32/src/exc_handler.S

    r24a2517 rc621f4aa  
    9696        ldmfd r3!, {r4-r7}
    9797        stmfd r13!, {r4-r7}
    98         stmfd r13!, {r13, lr}^
     98        mov r4, r13
     99        stmfd r4, {r13, lr}^
     100        nop                     /* Cannot access r13 immediately after stm(2) */
     101        sub r13, r13, #8
    99102        stmfd r13!, {r2}
     103
     104        # Stop stack traces here
     105        mov fp, #0
     106       
    100107        b 2f
    101108
    … …  
    123130        stmfd r13!, {r2}
    1241312:
    125         # Stop stack traces here
    126         mov fp, #0
    127132.endm
    128133
    … …  
    135140
    136141        # return to user mode
    137         ldmfd r13!, {r13, lr}^
     142        mov r0, r13
     143        ldmfd r0, {r13, lr}^
     144        nop                     /* Cannot access r13 immediately after ldm(2) */
     145        add r13, r13, #8
    138146        b 2f
    139147
    … …  
    150158        mov r0, #0
    151159        mov r1, r13
    152         bl ras_check 
     160        bl ras_check
    153161        LOAD_REGS_FROM_STACK
    154162
    … …  
    158166        mov r0, #5
    159167        mov r1, r13
    160         bl ras_check 
     168        bl ras_check
    161169        LOAD_REGS_FROM_STACK
    162170
    … …  
    166174        mov r0, #6
    167175        mov r1, r13
    168         bl ras_check 
     176        bl ras_check
    169177        LOAD_REGS_FROM_STACK
    170178
    … …  
    173181        mov r0, #1
    174182        mov r1, r13
    175         bl ras_check 
     183        bl ras_check
    176184        LOAD_REGS_FROM_STACK
    177185
    … …  
    181189        mov r0, #3
    182190        mov r1, r13
    183         bl ras_check 
     191        bl ras_check
    184192        LOAD_REGS_FROM_STACK
    185193
    … …  
    189197        mov r0, #4
    190198        mov r1, r13
    191         bl ras_check 
     199        bl ras_check
    192200        LOAD_REGS_FROM_STACK
    193201

  • kernel/arch/arm32/src/exception.c

    r24a2517 rc621f4aa  
    3737#include <arch/memstr.h>
    3838#include <arch/regutils.h>
     39#include <arch/machine_func.h>
    3940#include <interrupt.h>
    4041#include <arch/mm/page_fault.h>
    … …  
    4344#include <syscall/syscall.h>
    4445#include <stacktrace.h>
    45 
    46 #ifdef MACHINE_testarm
    47         #include <arch/mach/testarm/testarm.h>
    48 #endif
    49 
    50 #ifdef MACHINE_integratorcp
    51         #include <arch/mach/integratorcp/integratorcp.h>
    52 #endif
    5346
    5447/** Offset used in calculation of exception handler's relative address.
    … …  
    9184 *
    9285 * Dispatches the syscall.
     86 *
    9387 */
    94 static void swi_exception(int exc_no, istate_t *istate)
     88static void swi_exception(unsigned int exc_no, istate_t *istate)
    9589{
    9690        istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
    … …  
    148142 * Determines the sources of interrupt and calls their handlers.
    149143 */
    150 static void irq_exception(int exc_no, istate_t *istate)
     144static void irq_exception(unsigned int exc_no, istate_t *istate)
    151145{
    152146        machine_irq_exception(exc_no, istate);
    … …  
    165159        install_exception_handlers();
    166160       
    167         exc_register(EXC_IRQ, "interrupt", (iroutine) irq_exception);
    168         exc_register(EXC_PREFETCH_ABORT, "prefetch abort",
    169             (iroutine) prefetch_abort);
    170         exc_register(EXC_DATA_ABORT, "data abort", (iroutine) data_abort);
    171         exc_register(EXC_SWI, "software interrupt", (iroutine) swi_exception);
     161        exc_register(EXC_IRQ, "interrupt", true,
     162            (iroutine_t) irq_exception);
     163        exc_register(EXC_PREFETCH_ABORT, "prefetch abort", true,
     164            (iroutine_t) prefetch_abort);
     165        exc_register(EXC_DATA_ABORT, "data abort", true,
     166            (iroutine_t) data_abort);
     167        exc_register(EXC_SWI, "software interrupt", true,
     168            (iroutine_t) swi_exception);
    172169}
    173170
    … …  
    176173 * @param istate Structure to be printed.
    177174 */
    178 void print_istate(istate_t *istate)
     175void istate_decode(istate_t *istate)
    179176{
    180         printf("istate dump:\n");
    181        
    182         printf(" r0: %x    r1: %x    r2: %x    r3: %x\n",
     177        printf("r0 =%#0.8lx\tr1 =%#0.8lx\tr2 =%#0.8lx\tr3 =%#0.8lx\n",
    183178            istate->r0, istate->r1, istate->r2, istate->r3);
    184         printf(" r4: %x    r5: %x    r6: %x    r7: %x\n",
     179        printf("r4 =%#0.8lx\tr5 =%#0.8lx\tr6 =%#0.8lx\tr7 =%#0.8lx\n",
    185180            istate->r4, istate->r5, istate->r6, istate->r7);
    186         printf(" r8: %x    r8: %x   r10: %x    fp: %x\n",
     181        printf("r8 =%#0.8lx\tr9 =%#0.8lx\tr10=%#0.8lx\tfp =%#0.8lx\n",
    187182            istate->r8, istate->r9, istate->r10, istate->fp);
    188         printf(" r12: %x    sp: %x    lr: %x  spsr: %x\n",
     183        printf("r12=%#0.8lx\tsp =%#0.8lx\tlr =%#0.8lx\tspsr=%#0.8lx\n",
    189184            istate->r12, istate->sp, istate->lr, istate->spsr);
    190        
    191         printf(" pc: %x\n", istate->pc);
    192 
    193         stack_trace_istate(istate);
    194185}
    195186

  • kernel/arch/arm32/src/interrupt.c

    r24a2517 rc621f4aa  
    3636#include <arch/asm.h>
    3737#include <arch/regutils.h>
     38#include <arch/machine_func.h>
    3839#include <ddi/irq.h>
    3940#include <ddi/device.h>
    4041#include <interrupt.h>
    41 
    42 #ifdef MACHINE_testarm
    43         #include <arch/mach/testarm/testarm.h>
    44 #endif
    45 
    46 #ifdef MACHINE_integratorcp
    47         #include <arch/mach/integratorcp/integratorcp.h>
    48 #endif
    49 
    50 /** Initial size of a table holding interrupt handlers. */
    51 #define IRQ_COUNT 8
    5242
    5343/** Disable interrupts.
    … …  
    9787}
    9888
     89/** Check interrupts state.
     90 *
     91 * @return True if interrupts are disabled.
     92 *
     93 */
     94bool interrupts_disabled(void)
     95{
     96        return current_status_reg_read() & STATUS_REG_IRQ_DISABLED_BIT;
     97}
     98
    9999/** Initialize basic tables for exception dispatching
    100100 * and starts the timer.
    … …  
    102102void interrupt_init(void)
    103103{
    104         irq_init(IRQ_COUNT, IRQ_COUNT);
     104        size_t irq_count;
     105
     106        irq_count = machine_get_irq_count();
     107        irq_init(irq_count, irq_count);
     108
    105109        machine_timer_irq_start();
    106110}

  • kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

    r24a2517 rc621f4aa  
    5656static icp_hw_map_t icp_hw_map;
    5757static irq_t icp_timer_irq;
    58 struct arm_machine_ops machine_ops = {
     58struct arm_machine_ops icp_machine_ops = {
    5959        icp_init,
    6060        icp_timer_irq_start,
    6161        icp_cpu_halt,
    62         icp_get_memory_size,
     62        icp_get_memory_extents,
    6363        icp_irq_exception,
    6464        icp_frame_init,
    … …  
    214214}
    215215
    216 /** Returns the size of emulated memory.
    217  *
    218  * @return Size in bytes.
    219  */
    220 size_t icp_get_memory_size(void)
    221 {
     216/** Get extents of available memory.
     217 *
     218 * @param start         Place to store memory start address.
     219 * @param size          Place to store memory size.
     220 */
     221void icp_get_memory_extents(uintptr_t *start, uintptr_t *size)
     222{
     223        *start = 0;
     224
    222225        if (hw_map_init_called) {
    223                 return (sdram[((*(uint32_t *)icp_hw_map.sdramcr & ICP_SDRAM_MASK) >> 2)]);
     226                *size = (sdram[((*(uint32_t *)icp_hw_map.sdramcr &
     227                    ICP_SDRAM_MASK) >> 2)]);
    224228        } else {
    225                 return SDRAM_SIZE;
    226         }
    227        
     229                *size = SDRAM_SIZE;
     230        }
    228231}
    229232
    … …  
    242245 * @param istate Saved processor state.
    243246 */
    244 void icp_irq_exception(int exc_no, istate_t *istate)
     247void icp_irq_exception(unsigned int exc_no, istate_t *istate)
    245248{
    246249        uint32_t sources = icp_irqc_get_sources();
    247         int i;
     250        unsigned int i;
    248251       
    249252        for (i = 0; i < ICP_IRQC_MAX_IRQ; i++) {

  • kernel/arch/arm32/src/mach/testarm/testarm.c

    r24a2517 rc621f4aa  
    5656static irq_t gxemul_timer_irq;
    5757
    58 struct arm_machine_ops machine_ops = {
     58struct arm_machine_ops gxemul_machine_ops = {
    5959        gxemul_init,
    6060        gxemul_timer_irq_start,
    6161        gxemul_cpu_halt,
    62         gxemul_get_memory_size,
     62        gxemul_get_memory_extents,
    6363        gxemul_irq_exception,
    6464        gxemul_frame_init,
    … …  
    185185}
    186186
    187 /** Returns the size of emulated memory.
    188  *
    189  * @return Size in bytes.
    190  */
    191 uintptr_t gxemul_get_memory_size(void)
    192 {
    193         return  *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET));
    194 }
    195 
     187/** Get extents of available memory.
     188 *
     189 * @param start         Place to store memory start address.
     190 * @param size          Place to store memory size.
     191 */
     192void gxemul_get_memory_extents(uintptr_t *start, uintptr_t *size)
     193{
     194        *start = 0;
     195        *size = *((uintptr_t *) (GXEMUL_MP_ADDRESS + GXEMUL_MP_MEMSIZE_OFFSET));
     196}
    196197
    197198/** Returns the mask of active interrupts. */
    … …  
    205206 * Determines the sources of interrupt and calls their handlers.
    206207 */
    207 void gxemul_irq_exception(int exc_no, istate_t *istate)
     208void gxemul_irq_exception(unsigned int exc_no, istate_t *istate)
    208209{
    209210        uint32_t sources = gxemul_irqc_get_sources();
    210211        unsigned int i;
    211212
    212         for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) {
     213        for (i = 0; i < GXEMUL_IRQ_COUNT; i++) {
    213214                if (sources & (1 << i)) {
    214215                        irq_t *irq = irq_dispatch_and_lock(i);

  • kernel/arch/arm32/src/machine_func.c

    r24a2517 rc621f4aa  
    3939
    4040#include <arch/machine_func.h>
     41#include <arch/mach/gta02/gta02.h>
     42#include <arch/mach/integratorcp/integratorcp.h>
     43#include <arch/mach/testarm/testarm.h>
    4144
     45/** Pointer to machine_ops structure being used. */
     46struct arm_machine_ops *machine_ops;
     47
     48/** Initialize machine_ops pointer. */
     49void machine_ops_init(void)
     50{
     51#if defined(MACHINE_gta02)
     52        machine_ops = &gta02_machine_ops;
     53#elif defined(MACHINE_testarm)
     54        machine_ops = &gxemul_machine_ops;
     55#elif defined(MACHINE_integratorcp)
     56        machine_ops = &icp_machine_ops;
     57#else
     58#error Machine type not defined.
     59#endif
     60}
    4261
    4362/** Maps HW devices to the kernel address space using #hw_map. */
    4463void machine_init(void)
    4564{
    46         (machine_ops.machine_init)();
     65        (machine_ops->machine_init)();
    4766}
    4867
    … …  
    5170void machine_timer_irq_start(void)
    5271{
    53         (machine_ops.machine_timer_irq_start)();
     72        (machine_ops->machine_timer_irq_start)();
    5473}
    5574
    … …  
    5877void machine_cpu_halt(void)
    5978{
    60         (machine_ops.machine_cpu_halt)();
     79        (machine_ops->machine_cpu_halt)();
    6180}
    6281
    63 
    64 /** Returns size of available memory.
     82/** Get extents of available memory.
    6583 *
    66  *  @return Size of available memory.
     84 * @param start         Place to store memory start address.
     85 * @param size          Place to store memory size.
    6786 */
    68 uintptr_t machine_get_memory_size(void)
     87void machine_get_memory_extents(uintptr_t *start, uintptr_t *size)
    6988{
    70         return (machine_ops.machine_get_memory_size)();
     89        (machine_ops->machine_get_memory_extents)(start, size);
    7190}
    7291
    … …  
    7695 * @param istate Saved processor state.
    7796 */
    78 void machine_irq_exception(int exc_no, istate_t *istate)
     97void machine_irq_exception(unsigned int exc_no, istate_t *istate)
    7998{
    80         (machine_ops.machine_irq_exception)(exc_no, istate);
     99        (machine_ops->machine_irq_exception)(exc_no, istate);
    81100}
    82101
    … …  
    87106void machine_frame_init(void)
    88107{
    89         (machine_ops.machine_frame_init)();
     108        (machine_ops->machine_frame_init)();
    90109}
    91110
    … …  
    95114void machine_output_init(void)
    96115{
    97         (machine_ops.machine_output_init)();
     116        (machine_ops->machine_output_init)();
    98117}
    99118
    … …  
    103122void machine_input_init(void)
    104123{
    105         (machine_ops.machine_input_init)();
     124        (machine_ops->machine_input_init)();
    106125}
    107126
    108 /*
    109  * Generic function to use, if sepcific function doesn't define any of the above functions.
    110  */
    111 void machine_genfunc()
     127/** Get IRQ number range used by machine. */
     128size_t machine_get_irq_count(void)
    112129{
     130        size_t irq_count;
     131 
     132#if defined(MACHINE_gta02)
     133        irq_count = GTA02_IRQ_COUNT;
     134#elif defined(MACHINE_testarm)
     135        irq_count = GXEMUL_IRQ_COUNT;
     136#elif defined(MACHINE_integratorcp)
     137        irq_count = ICP_IRQ_COUNT;
     138#else
     139#error Machine type not defined.
     140#endif
     141        return irq_count;
    113142}
    114143

  • kernel/arch/arm32/src/mm/frame.c

    r24a2517 rc621f4aa  
    3636#include <mm/frame.h>
    3737#include <arch/mm/frame.h>
     38#include <arch/machine_func.h>
    3839#include <config.h>
    39 
    40 #ifdef MACHINE_testarm
    41         #include <arch/mach/testarm/testarm.h>
    42 #endif
    43 
    44 #ifdef MACHINE_integratorcp
    45         #include <arch/mach/integratorcp/integratorcp.h>
    46 #endif
     40#include <align.h>
    4741
    4842/** Address of the last frame in the memory. */
    … …  
    5246void frame_arch_init(void)
    5347{
    54         last_frame = machine_get_memory_size();
     48        uintptr_t mem_start, mem_size;
     49        uintptr_t first_frame;
     50        uintptr_t num_frames;
     51
     52        machine_get_memory_extents(&mem_start, &mem_size);
     53        first_frame = ALIGN_UP(mem_start, FRAME_SIZE);
     54        last_frame = ALIGN_DOWN(mem_start + mem_size, FRAME_SIZE);
     55        num_frames = (last_frame - first_frame) >> FRAME_WIDTH;
    5556       
    5657        /* All memory as one zone */
    57         zone_create(0, ADDR2PFN(last_frame),
     58        zone_create(first_frame >> FRAME_WIDTH, num_frames,
    5859            BOOT_PAGE_TABLE_START_FRAME + BOOT_PAGE_TABLE_SIZE_IN_FRAMES, 0);
    5960       

  • kernel/arch/arm32/src/mm/page.c

    r24a2517 rc621f4aa  
    2727 */
    2828
    29 /** @addtogroup arm32mm 
     29/** @addtogroup arm32mm
    3030 * @{
    3131 */
    … …  
    4141#include <arch/exception.h>
    4242#include <typedefs.h>
    43 #include <arch/types.h>
    4443#include <interrupt.h>
    4544#include <arch/mm/frame.h>
    … …  
    5453        int flags = PAGE_CACHEABLE;
    5554        page_mapping_operations = &pt_mapping_operations;
     55
     56        page_table_lock(AS_KERNEL, true);
    5657       
    5758        uintptr_t cur;
    5859        /* Kernel identity mapping */
    59         for (cur = 0; cur < last_frame; cur += FRAME_SIZE)
     60        for (cur = PHYSMEM_START_ADDR; cur < last_frame; cur += FRAME_SIZE)
    6061                page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
    6162       
    … …  
    6768#error "Only high exception vector supported now"
    6869#endif
     70        cur = ALIGN_DOWN(0x50008010, FRAME_SIZE);
     71        page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags);
     72
     73        page_table_unlock(AS_KERNEL, true);
    6974       
    7075        as_switch(NULL, AS_KERNEL);
    … …  
    9398        uintptr_t virtaddr = PA2KA(last_frame);
    9499        pfn_t i;
     100
     101        page_table_lock(AS_KERNEL, true);
    95102        for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
    96103                page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i),
    … …  
    98105                    PAGE_NOT_CACHEABLE | PAGE_READ | PAGE_WRITE | PAGE_KERNEL);
    99106        }
     107        page_table_unlock(AS_KERNEL, true);
    100108       
    101109        last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);

  • kernel/arch/arm32/src/mm/page_fault.c

    r24a2517 rc621f4aa  
    167167/** Handles "data abort" exception (load or store at invalid address).
    168168 *
    169  * @param exc_no        Exception number.
    170  * @param istate        CPU state when exception occured.
    171  */
    172 void data_abort(int exc_no, istate_t *istate)
     169 * @param exc_no Exception number.
     170 * @param istate CPU state when exception occured.
     171 *
     172 */
     173void data_abort(unsigned int exc_no, istate_t *istate)
    173174{
    174175        fault_status_t fsr __attribute__ ((unused)) =
    … …  
    182183        if (ret == AS_PF_FAULT) {
    183184                fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr);
    184                 print_istate(istate);
    185                 printf("page fault - pc: %x, va: %x, status: %x(%x), "
    186                     "access:%d\n", istate->pc, badvaddr, fsr.status, fsr,
    187                     access);
    188                
    189                 panic("Page fault.");
     185                panic_memtrap(istate, access, badvaddr, NULL);
    190186        }
    191187}
    … …  
    193189/** Handles "prefetch abort" exception (instruction couldn't be executed).
    194190 *
    195  * @param exc_no        Exception number.
    196  * @param istate        CPU state when exception occured.
    197  */
    198 void prefetch_abort(int exc_no, istate_t *istate)
     191 * @param exc_no Exception number.
     192 * @param istate CPU state when exception occured.
     193 *
     194 */
     195void prefetch_abort(unsigned int exc_no, istate_t *istate)
    199196{
    200197        int ret = as_page_fault(istate->pc, PF_ACCESS_EXEC, istate);
    201198
    202199        if (ret == AS_PF_FAULT) {
    203                 printf("prefetch_abort\n");
    204                 print_istate(istate);
    205                 panic("page fault - prefetch_abort at address: %x.",
    206                     istate->pc);
     200                fault_if_from_uspace(istate,
     201                    "Page fault - prefetch_abort: %#x.", istate->pc);
     202                panic_memtrap(istate, PF_ACCESS_EXEC, istate->pc, NULL);
    207203        }
    208204}

  • kernel/arch/arm32/src/mm/tlb.c

    r24a2517 rc621f4aa  
    3737#include <arch/mm/asid.h>
    3838#include <arch/asm.h>
    39 #include <arch/types.h>
     39#include <typedefs.h>
    4040#include <arch/mm/page.h>
    4141

  • kernel/arch/arm32/src/ras.c

    r24a2517 rc621f4aa  
    11/*
    2  * Copyright (c) 2009 Jakub Jermar 
     2 * Copyright (c) 2009 Jakub Jermar
    33 * All rights reserved.
    44 *
    … …  
    4444#include <arch.h>
    4545#include <memstr.h>
    46 #include <arch/types.h>
     46#include <typedefs.h>
    4747
    4848uintptr_t *ras_page = NULL;
    … …  
    6666}
    6767
    68 void ras_check(int n, istate_t *istate)
     68void ras_check(unsigned int n, istate_t *istate)
    6969{
    7070        uintptr_t rewrite_pc = istate->pc;

  • kernel/arch/arm32/src/userspace.c

    r24a2517 rc621f4aa  
    9797                "mov sp, %[ustate]\n"
    9898                "msr spsr_c, %[user_mode]\n"
    99                 "ldmfd sp!, {r0-r12, sp, lr}^\n"
     99                "ldmfd sp, {r0-r12, sp, lr}^\n"
     100                "nop\n"         /* Cannot access sp immediately after ldm(2) */
     101                "add sp, sp, #(15*4)\n"
    100102                "ldmfd sp!, {pc}^\n"
    101103                :: [ustate] "r" (&ustate), [user_mode] "r" (user_mode)
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