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  • kernel/arch/arm32/src/exception.c

    r8cf4823 rc5b69a5e  
    117117
    118118#ifdef HIGH_EXCEPTION_VECTORS
    119 /** Activates use of high exception vectors addresses. */
     119/** Activates use of high exception vectors addresses.
     120 *
     121 * "High vectors were introduced into some implementations of ARMv4 and are
     122 * required in ARMv6 implementations. High vectors allow the exception vector
     123 * locations to be moved from their normal address range 0x00000000-0x0000001C
     124 * at the bottom of the 32-bit address space, to an alternative address range
     125 * 0xFFFF0000-0xFFFF001C near the top of the address space. These alternative
     126 * locations are known as the high vectors.
     127 *
     128 * Prior to ARMv6, it is IMPLEMENTATION DEFINED whether the high vectors are
     129 * supported. When they are, a hardware configuration input selects whether
     130 * the normal vectors or the high vectors are to be used from
     131 * reset." ARM Architecture Reference Manual A2.6.11 (p. 64 in the PDF).
     132 */
    120133static void high_vectors(void)
    121134{
    122         uint32_t control_reg;
    123        
     135        uint32_t control_reg = 0;
     136        // TODO CHeck the armv6 way and implement it
     137#if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6)
    124138        asm volatile (
    125139                "mrc p15, 0, %[control_reg], c1, c0"
    126140                : [control_reg] "=r" (control_reg)
    127141        );
     142#elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
     143        asm volatile (
     144                "mrc p15, 0, %[control_reg], c1, c1"
     145                : [control_reg] "=r" (control_reg)
     146        );
     147#endif
    128148       
    129149        /* switch on the high vectors bit */
    130150        control_reg |= CP15_R1_HIGH_VECTORS_BIT;
    131151       
     152#if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6)
    132153        asm volatile (
    133154                "mcr p15, 0, %[control_reg], c1, c0"
    134155                :: [control_reg] "r" (control_reg)
    135156        );
     157#elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
     158        asm volatile (
     159                "mcr p15, 0, %[control_reg], c1, c1"
     160                :: [control_reg] "r" (control_reg)
     161        );
     162#endif
    136163}
    137164#endif
     
    153180void exception_init(void)
    154181{
     182        // TODO check for availability of high vectors for <= armv5
    155183#ifdef HIGH_EXCEPTION_VECTORS
    156184        high_vectors();
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