Changeset c3f95d8 in mainline for boot

Timestamp:

2011-03-13T11:39:00Z (15 years ago)

Author:

Martin Sucha <sucha14@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

5e3eea10

Parents:

f8c60f5 (diff), c1a5d8d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merged mainline changes

Location:

boot

Files:

• arch/mips32/src/asm.S (modified) (3 diffs)
• arch/sparc64/include/arch.h (modified) (1 diff)
• arch/sparc64/src/asm.S (modified) (1 diff)
• arch/sparc64/src/main.c (modified) (4 diffs)
• generic/src/balloc.c (modified) (1 diff)

boot/arch/mips32/src/asm.S

@@ -41 +41 @@
 
 start:
-        /* Setup CPU map (on msim this code
-           is executed in parallel on all CPUs,
-           but it not an issue) */
+        /*
+         * Setup the CP0 configuration
+         *  - Disable 64-bit kernel addressing mode
+         *  - DIsable 64-bit supervisor adressing mode
+         *  - Disable 64-bit user addressing mode
+         */
+        mfc0 $a0, $status
+        la $a1, 0xffffff1f
+        and $a0, $a1, $a0
+        mtc0 $a0, $status
+        
+        /*
+         * Setup CPU map (on msim this code
+         * is executed in parallel on all CPUs,
+         * but it not an issue).
+         */
         la $a0, PA2KA(CPUMAP_OFFSET)
         
@@ -94 +107 @@
         lw $k1, ($k0)
         
-        /* If we are not running on BSP
-           then end in an infinite loop  */
+        /*
+         * If we are not running on BSP
+         * then end in an infinite loop.
+         */
         beq $k1, $zero, bsp
         nop
@@ -127 +142 @@
 
 jump_to_kernel:
-        #
-        # TODO:
-        # Make sure that the I-cache, D-cache and memory are mutually coherent
-        # before passing control to the copied code.
-        #
+        /*
+         * TODO:
+         *
+         * Make sure that the I-cache, D-cache and memory are mutually
+         * coherent before passing control to the copied code.
+         */
         j $a0
         nop

boot/arch/sparc64/include/arch.h

@@ -41 +41 @@
 #define STACK_BIAS                   2047
 #define STACK_WINDOW_SAVE_AREA_SIZE  (16 * 8)
+#define STACK_ARG_SAVE_AREA_SIZE     (6 * 8)
 
 #define NWINDOWS  8

boot/arch/sparc64/src/asm.S

@@ -152 +152 @@
 .global ofw
 ofw:
-        save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+        save %sp, -(STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE), %sp
         set ofw_cif, %l0
         ldx [%l0], %l0

boot/arch/sparc64/src/main.c

@@ -190 +190 @@
         bootinfo.memmap.zones[0].start += OBP_BIAS;
         bootinfo.memmap.zones[0].size -= OBP_BIAS;
+        bootinfo.memmap.total -= OBP_BIAS;
 }
 
@@ -204 +205 @@
         bootinfo.physmem_start = ofw_get_physmem_start();
         ofw_memmap(&bootinfo.memmap);
+
+        if (arch == ARCH_SUN4V)
+                sun4v_fixups();
         
         void *bootinfo_pa = ofw_translate(&bootinfo);
@@ -253 +257 @@
                 
                 /*
-                 * At this point, we claim the physical memory that we are
-                 * going to use. We should be safe in case of the virtual
+                 * At this point, we claim and map the physical memory that we
+                 * are going to use. We should be safe in case of the virtual
                  * address space because the OpenFirmware, according to its
-                 * SPARC binding, should restrict its use of virtual memory
-                 * to addresses from [0xffd00000; 0xffefffff] and
-                 * [0xfe000000; 0xfeffffff].
-                 *
-                 * We don't map this piece of memory. We simply rely on
-                 * SILO to have it done for us already in this case.
-                 *
-                 * XXX SILO only maps 8 MB for us here. We should improve
-                 *     this code to be totally independent on the behavior
-                 *     of SILO.
-                 *
+                 * SPARC binding, should restrict its use of virtual memory to
+                 * addresses from [0xffd00000; 0xffefffff] and [0xfe000000;
+                 * 0xfeffffff].
                  */
                 ofw_claim_phys(bootinfo.physmem_start + dest[i - 1],
                     ALIGN_UP(components[i - 1].inflated, PAGE_SIZE));
+                
+                ofw_map(bootinfo.physmem_start + dest[i - 1], dest[i - 1],
+                    ALIGN_UP(components[i - 1].inflated, PAGE_SIZE), -1);
                 
                 int err = inflate(components[i - 1].start, components[i - 1].size,
@@ -304 +303 @@
                 sun4u_smp();
         
-        if (arch == ARCH_SUN4V)
-                sun4v_fixups();
-        
         printf("Booting the kernel ...\n");
         jump_to_kernel(bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo, subarch,

boot/generic/src/balloc.c

@@ -65 +65 @@
 void *balloc_rebase(void *ptr)
 {
-        return (void *) ((uintptr_t) ptr - phys_base + ballocs->base);
+        return (void *) (((uintptr_t) ptr - phys_base) + ballocs->base);
 }