Index: arch/ia64/include/asm.h
===================================================================
--- arch/ia64/include/asm.h	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/ia64/include/asm.h	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -30,6 +30,6 @@
 #define __ia64_ASM_H__
 
+#include <config.h>
 #include <arch/types.h>
-#include <config.h>
 #include <arch/register.h>
 
Index: arch/ia64/include/mm/asid.h
===================================================================
--- arch/ia64/include/mm/asid.h	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/ia64/include/mm/asid.h	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -54,4 +54,5 @@
 #define ASID_OVERFLOW		(RID_OVERFLOW/RIDS_PER_ASID)
 
+/** On ia64, this is no-op. */
 #define asid_put_arch(x)
 
Index: arch/ia64/include/mm/page.h
===================================================================
--- arch/ia64/include/mm/page.h	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/ia64/include/mm/page.h	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -1,4 +1,5 @@
 /*
- * Copyright (C) 2005 Jakub Jermar
+ * Copyright (C) 2005 - 2006 Jakub Jermar
+ * Copyright (C) 2006 Jakub Vana
  * All rights reserved.
  *
@@ -30,6 +31,9 @@
 #define __ia64_PAGE_H__
 
+#include <arch/mm/frame.h>
+#include <genarch/mm/page_ht.h>
 #include <arch/types.h>
-#include <arch/mm/frame.h>
+#include <typedefs.h>
+#include <debug.h>
 
 #define PAGE_SIZE	FRAME_SIZE
@@ -52,118 +56,187 @@
 #define HT_SET_RECORD_ARCH(t, page, asid, frame, flags)
 
-#define REGION_RID_MAIN 0
-#define REGION_RID_FIRST_INVALID 16
-#define REGION_REGISTERS 8
-
-#define VHPT_WIDTH 16         /*64kB*/
-#define VHPT_SIZE (1<<VHPT_WIDTH)
-
-#define VHPT_BASE 0           /* Must be aligned to VHPT_SIZE */
-
-struct VHPT_tag_info
-{
-	unsigned long long tag       :63;
-	unsigned           ti        : 1;
-}__attribute__ ((packed));
-
-union VHPT_tag
-{
-	struct VHPT_tag_info tag_info;
-	unsigned             tag_word;
+#define VRN_KERNEL	 		0
+#define REGION_REGISTERS 		8
+
+#define VHPT_WIDTH 			20         	/* 1M */
+#define VHPT_SIZE 			(1<<VHPT_WIDTH)
+
+#define VHPT_BASE 			page_ht		/* Must be aligned to VHPT_SIZE */
+
+struct vhpt_tag_info {
+	unsigned long long tag : 63;
+	unsigned ti : 1;
+} __attribute__ ((packed));
+
+union vhpt_tag {
+	struct vhpt_tag_info tag_info;
+	unsigned tag_word;
 };
 
-struct VHPT_entry_present
-{
-
+struct vhpt_entry_present {
 	/* Word 0 */
-	unsigned p              : 1;
-	unsigned rv0            : 1;
-	unsigned ma             : 3;
-	unsigned a              : 1;
-	unsigned d              : 1;
-	unsigned pl             : 2;
-	unsigned ar             : 3;
-	unsigned long long ppn  :38;
-	unsigned rv1            : 2;
-	unsigned ed             : 1;
-	unsigned ig1            :11;
+	unsigned p : 1;
+	unsigned : 1;
+	unsigned ma : 3;
+	unsigned a : 1;
+	unsigned d : 1;
+	unsigned pl : 2;
+	unsigned ar : 3;
+	unsigned long long ppn : 38;
+	unsigned : 2;
+	unsigned ed : 1;
+	unsigned ig1 : 11;
 	
 	/* Word 1 */
-	unsigned rv2            : 2;
-	unsigned ps             : 6;
-	unsigned key            :24;
-	unsigned rv3            :32;
+	unsigned : 2;
+	unsigned ps : 6;
+	unsigned key : 24;
+	unsigned : 32;
 	
 	/* Word 2 */
-	union VHPT_tag tag;       /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/
-                            /* But I'm almost sure we nead access to whole word so there are both possibilities*/
+	union vhpt_tag tag;
+	
 	/* Word 3 */													
-	unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/
-	
-}__attribute__ ((packed));
-
-struct VHPT_entry_not_present
-{
+	unsigned long long next : 64;	/**< Collision chain next pointer. */
+} __attribute__ ((packed));
+
+struct vhpt_entry_not_present {
 	/* Word 0 */
-	unsigned p              : 1;
-	unsigned long long ig0  :52;
-	unsigned ig1            :11;
+	unsigned p : 1;
+	unsigned long long ig0 : 52;
+	unsigned ig1 : 11;
 	
 	/* Word 1 */
-	unsigned rv2            : 2;
-	unsigned ps             : 6;
-	unsigned long long ig2  :56;
-
-	
+	unsigned : 2;
+	unsigned ps : 6;
+	unsigned long long ig2 : 56;
+
 	/* Word 2 */
-	union VHPT_tag tag;       /*This data is here as union because I'm not sure if anybody nead access to areas ti and tag in VHPT entry*/
-                            /* But I'm almost sure we nead access to whole word so there are both possibilities*/
+	union vhpt_tag tag;
+	
 	/* Word 3 */													
-	unsigned long long next :64; /* This ignored field will be (in my hopes ;-) ) used as pointer in link list of entries with same hash value*/
-	
-}__attribute__ ((packed));
-
-typedef union VHPT_entry 
-{
-	struct VHPT_entry_present        present;
-	struct VHPT_entry_not_present    not_present;
-}VHPT_entry;
+	unsigned long long next : 64;	/**< Collision chain next pointer. */
+	
+} __attribute__ ((packed));
+
+typedef union vhpt_entry {
+	struct vhpt_entry_present present;
+	struct vhpt_entry_not_present not_present;
+} vhpt_entry;
+
+struct region_register_map {
+	unsigned ve : 1;
+	unsigned : 1;
+	unsigned ps : 6;
+	unsigned rid : 24;
+	unsigned : 32;
+} __attribute__ ((packed));
+
+typedef union region_register {
+	struct region_register_map map;
+	unsigned long long word;
+} region_register;
+
+struct pta_register_map {
+	unsigned ve : 1;
+	unsigned : 1;
+	unsigned size : 6;
+	unsigned vf : 1;
+	unsigned : 6;
+	unsigned long long base : 49;
+} __attribute__ ((packed));
+
+typedef union pta_register {
+	struct pta_register_map map;
+	__u64 word;
+} pta_register;
+
+/** Return Translation Hashed Entry Address.
+ *
+ * VRN bits are used to read RID (ASID) from one
+ * of the eight region registers registers.
+ *
+ * @param va Virtual address including VRN bits.
+ *
+ * @return Address of the head of VHPT collision chain.
+ */
+static inline __u64 thash(__u64 va)
+{
+	__u64 ret;
+
+	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
+
+	return ret;
+}
+
+/** Return Translation Hashed Entry Tag.
+ *
+ * VRN bits are used to read RID (ASID) from one
+ * of the eight region registers.
+ *
+ * @param va Virtual address including VRN bits.
+ *
+ * @return The unique tag for VPN and RID in the collision chain returned by thash().
+ */
+static inline __u64 ttag(__u64 va)
+{
+	__u64 ret;
+
+	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
+
+	return ret;
+}
+
+/** Read Region Register.
+ *
+ * @param i Region register index.
+ *
+ * @return Current contents of rr[i].
+ */
+static inline __u64 rr_read(index_t i)
+{
+	__u64 ret;
+	
+//	ASSERT(i < REGION_REGISTERS);
+	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
+	
+	return ret;
+}
+
+
+/** Write Region Register.
+ *
+ * @param i Region register index.
+ * @param v Value to be written to rr[i].
+ */
+static inline void rr_write(index_t i, __u64 v)
+{
+//	ASSERT(i < REGION_REGISTERS);
+	__asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
+}
+ 
+/** Read Page Table Register.
+ *
+ * @return Current value stored in PTA.
+ */
+static inline __u64 pta_read(void)
+{
+	__u64 ret;
+	
+	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
+	
+	return ret;
+}
+
+/** Write Page Table Register.
+ *
+ * @param v New value to be stored in PTA.
+ */
+static inline void pta_write(__u64 v)
+{
+	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
+}
 
 extern void page_arch_init(void);
 
-
-struct region_register_map
-{
-  unsigned ve            : 1;
-	unsigned r0            : 1;
-	unsigned ps            : 6;
-	unsigned rid           :24;
-	unsigned r1            :32;
-}__attribute__ ((packed));
-
-
-typedef union region_register
-{
-	struct region_register_map   map;
-	unsigned long long           word;
-}region_register;
-
-struct PTA_register_map
-{
-  unsigned ve            : 1;
-	unsigned r0            : 1;
-	unsigned size          : 6;
-	unsigned vf            : 1;
-	unsigned r1            : 6;
-	unsigned long long base:49;
-}__attribute__ ((packed));
-
-
-typedef union PTA_register
-{
-	struct PTA_register_map   map;
-	unsigned long long        word;
-}PTA_register;
-
-
 #endif
Index: arch/ia64/include/types.h
===================================================================
--- arch/ia64/include/types.h	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/ia64/include/types.h	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -37,6 +37,4 @@
 typedef signed long __s64;
 
-
-
 typedef unsigned char __u8;
 typedef unsigned short __u16;
@@ -50,5 +48,5 @@
 typedef __u64 __native;
 
-typedef __u64 pte_t;
+typedef union vhpt_entry pte_t;
 
 #endif
Index: arch/ia64/src/mm/page.c
===================================================================
--- arch/ia64/src/mm/page.c	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/ia64/src/mm/page.c	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -1,4 +1,5 @@
 /*
  * Copyright (C) 2006 Jakub Jermar
+ * Copyright (C) 2006 Jakub Vana
  * All rights reserved.
  *
@@ -28,119 +29,72 @@
 
 #include <arch/mm/page.h>
+#include <genarch/mm/page_ht.h>
+#include <mm/asid.h>
 #include <arch/types.h>
-#include <genarch/mm/page_ht.h>
 #include <print.h>
 #include <mm/page.h>
+#include <mm/frame.h>
 #include <config.h>
 #include <panic.h>
 #include <arch/asm.h>
+#include <arch/barrier.h>
 
-__u64 thash(__u64 va);
-__u64 thash(__u64 va)
+/** Initialize VHPT and region registers. */
+static void set_vhpt_environment(void)
 {
-	__u64 ret;
-	asm
-	(
-		"thash %0=%1;;"
-		:"=r"(ret)
-		:"r" (va)
-	);
+	region_register rr;
+	pta_register pta;	
+	int i;
 	
-	return ret;
+	/*
+	 * First set up kernel region register.
+	 */
+	rr.word = rr_read(VRN_KERNEL);
+	rr.map.ve = 0;                  /* disable VHPT walker */
+	rr.map.ps = PAGE_WIDTH;
+	rr.map.rid = ASID_KERNEL;
+	rr_write(VRN_KERNEL, rr.word);
+	srlz_i();
+	srlz_d();
+	
+	/*
+	 * And invalidate the rest of region register.
+	 */
+	for(i = 0; i < REGION_REGISTERS; i++) {
+		/* skip kernel rr */
+		if (i == VRN_KERNEL)
+			continue;
+	
+		rr.word == rr_read(i);
+		rr.map.rid = ASID_INVALID;
+		rr_write(i, rr.word);
+		srlz_i();
+		srlz_d();
+	}
+
+	/*
+	 * Allocate VHPT and invalidate all its entries.
+	 */
+	page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL);
+	ht_invalidate_all();
+	
+	/*
+	 * Set up PTA register.
+	 */
+	pta.word = pta_read();
+	pta.map.ve = 0;                   /* disable VHPT walker */
+	pta.map.vf = 1;                   /* large entry format */
+	pta.map.size = VHPT_WIDTH;
+	pta.map.base = (__address) page_ht;
+	pta_write(pta.word);
+	srlz_i();
+	srlz_d();
 }
 
-__u64 ttag(__u64 va);
-__u64 ttag(__u64 va)
-{
-	__u64 ret;
-	asm
-	(
-		"ttag %0=%1;;"
-		:"=r"(ret)
-		:"r" (va)
-	);
-	
-	return ret;
-}
-
-
-static void set_VHPT_environment(void)
-{
-	
-
-	/*
-	TODO:
-	*/
-	
-	int i;
-	
-	/* First set up REGION REGISTER 0 */
-	
-	region_register rr;
-	rr.map.ve=0;                  /*Disable Walker*/
-	rr.map.ps=PAGE_WIDTH;
-	rr.map.rid=REGION_RID_MAIN;
-	
-	asm
-	(
-		";;\n"
-		"srlz.i;;\n"
-		"srlz.d;;\n"
-		"{mov rr[r0]=%0};;\n"
-		"srlz.i;;\n"
-		"srlz.d;;\n"
-		";;\n"
-		:
-		:"r"(rr.word)
-	);
-
-			
-	/* And Invalidate the rest of REGION REGISTERS */
-	for(i=1;i<REGION_REGISTERS;i++)
-	{
-		rr.map.rid=REGION_RID_FIRST_INVALID+i-1;
-		asm
-		(
-			";;\n"
-/*			"mov r8=%1;;\n"*/
-/*			"mov rr[r8]=%0;;\n"*/
-			"srlz.i;;\n"
-			"srlz.d;;\n"
-			"{mov rr[%1]=%0};;\n"
-			"srlz.i;;\n"
-			"srlz.d;;\n"
-			:
-			:"r"(rr.word),"r"(i)
-			:"r8"
-		);
-	};
-
-	
-
-	PTA_register pta;
-	pta.map.ve=0;                   /*Disable Walker*/
-	pta.map.vf=1;                   /*Large entry format*/
-	pta.map.size=VHPT_WIDTH;
-	pta.map.base=VHPT_BASE;
-	
-	return ;
-	
-	printf("pta struct size:%d\n",sizeof(pta));
-	
-	/*Write PTA*/
-	asm
-	(
-		"mov cr8=%0;;"
-		:
-		:"r"(pta.word)
-	);	
-	return ;
-}	
-
-
+/** Initialize ia64 virtual address translation subsystem. */
 void page_arch_init(void)
 {
 	page_operations = &page_ht_operations;
 	pk_disable();
-	set_VHPT_environment();
+	set_vhpt_environment();
 }
Index: arch/sparc64/src/trap/interrupt.c
===================================================================
--- arch/sparc64/src/trap/interrupt.c	(revision 2a003d5b70d5a4307a6cbdff215872746300cb53)
+++ arch/sparc64/src/trap/interrupt.c	(revision c2b95d3111e055b6d943ddfba623e6f44e4262d0)
@@ -29,4 +29,5 @@
 #include <arch/interrupt.h>
 #include <interrupt.h>
+#include <arch/types.h>
 #include <debug.h>
 
