Changeset c049309 in mainline for kernel/arch/xen32/include
- Timestamp:
- 2006-07-30T15:57:07Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- b3e8c90
- Parents:
- 764c302
- Location:
- kernel/arch/xen32/include
- Files:
-
- 4 edited
-
asm.h (modified) (2 diffs)
-
boot/boot.h (modified) (1 diff)
-
mm/frame.h (modified) (2 diffs)
-
mm/page.h (modified) (4 diffs)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/xen32/include/asm.h
r764c302 rc049309 43 43 extern uint32_t interrupt_handler_size; 44 44 45 extern void paging_on(void);46 47 45 extern void interrupt_handlers(void); 48 46 … … 75 73 GEN_READ_REG(cr0); 76 74 GEN_READ_REG(cr2); 77 GEN_READ_REG(cr3);78 GEN_WRITE_REG(cr3);79 75 80 76 GEN_READ_REG(dr0); -
kernel/arch/xen32/include/boot/boot.h
r764c302 rc049309 45 45 46 46 typedef struct { 47 char magic[32];/**< "xen-<version>-<platform>" */48 u nsigned long nr_pages; /**< Total pages allocated to this domain*/49 void *shared_info; /**< Machine address of shared info struct*/47 int8_t magic[32]; /**< "xen-<version>-<platform>" */ 48 uint32_t frames; /**< Available frames */ 49 void *shared_info; /**< Shared info structure (machine address) */ 50 50 uint32_t flags; /**< SIF_xxx flags */ 51 void *store_mfn; /**< Machine page number of shared page*/51 pfn_t store_mfn; /**< Shared page (machine page) */ 52 52 uint32_t store_evtchn; /**< Event channel for store communication */ 53 void *console_mfn; /**< Machine address of console page*/53 void *console_mfn; /**< Console page (machine address) */ 54 54 uint32_t console_evtchn; /**< Event channel for console messages */ 55 unsigned long *pt_base; /**< Virtual address of page directory*/56 u nsigned long nr_pt_frames; /**< Number of bootstrap p.t.frames */57 unsigned long *mfn_list; /**< Virtual address of page-frame list*/58 void *mod_start; /**< Virtual address of pre-loaded module*/59 u nsigned long mod_len; /**< Size (bytes) of pre-loaded module*/55 pte_t *ptl0; /**< Boot PTL0 (kernel address) */ 56 uint32_t pt_frames; /**< Number of bootstrap page table frames */ 57 pfn_t *pm_map; /**< Physical->machine frame map (kernel address) */ 58 void *mod_start; /**< Modules start (kernel address) */ 59 uint32_t mod_len; /**< Modules size (bytes) */ 60 60 int8_t cmd_line[GUEST_CMDLINE]; 61 61 } start_info_t; -
kernel/arch/xen32/include/mm/frame.h
r764c302 rc049309 37 37 38 38 #define FRAME_WIDTH 12 /* 4K */ 39 #define FRAME_SIZE (1 <<FRAME_WIDTH)39 #define FRAME_SIZE (1 << FRAME_WIDTH) 40 40 41 41 … … 44 44 45 45 #include <arch/types.h> 46 #include <arch/boot/boot.h> 47 48 #define PA2MA(x) ((start_info.pm_map[((uintptr_t) (x)) >> 12] << 12) + (((uintptr_t) (x)) & 0xfff)) 46 49 47 50 extern uintptr_t last_frame; -
kernel/arch/xen32/include/mm/page.h
r764c302 rc049309 44 44 45 45 #ifndef __ASM__ 46 # include <arch/hypercall.h> 46 47 # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 47 48 # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) … … 60 61 #define PTL3_ENTRIES_ARCH 1024 61 62 62 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >>22)&0x3ff)63 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) 63 64 #define PTL1_INDEX_ARCH(vaddr) 0 64 65 #define PTL2_INDEX_ARCH(vaddr) 0 65 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >>12)&0x3ff)66 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) 66 67 67 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address) <<12))68 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address) << 12)) 68 69 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) 69 70 #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) 70 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)((((pte_t *)(ptl3))[(i)].frame_address) <<12))71 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)((((pte_t *)(ptl3))[(i)].frame_address) << 12)) 71 72 72 #define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((uintptr_t) (ptl0))) 73 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].frame_address = (a)>>12) 73 #define SET_PTL0_ADDRESS_ARCH(ptl0) { \ 74 mmuext_op_t mmu_ext; \ 75 mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \ 76 mmu_ext.arg1.mfn = ADDR2PFN(PA2MA(ptl0)); \ 77 xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \ 78 } 79 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \ 80 mmu_update_t update; \ 81 update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \ 82 update.val = PA2MA(a); \ 83 xen_mmu_update(&update, 1, NULL, DOMID_SELF); \ 84 } 74 85 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) 75 86 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) 76 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].frame_address = (a)>>12) 87 #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \ 88 mmu_update_t update; \ 89 update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \ 90 update.val = PA2MA(a); \ 91 xen_mmu_update(&update, 1, NULL, DOMID_SELF); \ 92 } 77 93 78 94 #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) … … 88 104 #define PTE_VALID_ARCH(p) (*((uint32_t *) (p)) != 0) 89 105 #define PTE_PRESENT_ARCH(p) ((p)->present != 0) 90 #define PTE_GET_FRAME_ARCH(p) ((p)->frame_address <<FRAME_WIDTH)106 #define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH) 91 107 #define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0) 92 108 #define PTE_EXECUTABLE_ARCH(p) 1 … … 102 118 103 119 /** When bit on this position is 0, the page fault was caused by a not-present page. */ 104 #define PFERR_CODE_P (1 <<0)120 #define PFERR_CODE_P (1 << 0) 105 121 106 122 /** When bit on this position is 1, the page fault was caused by a write. */ 107 #define PFERR_CODE_RW (1 <<1)123 #define PFERR_CODE_RW (1 << 1) 108 124 109 125 /** When bit on this position is 1, the page fault was caused in user mode. */ 110 #define PFERR_CODE_US (1 <<2)126 #define PFERR_CODE_US (1 << 2) 111 127 112 128 /** When bit on this position is 1, a reserved bit was set in page directory. */ 113 #define PFERR_CODE_RSVD (1 <<3)129 #define PFERR_CODE_RSVD (1 << 3) 114 130 115 131 /** Page Table Entry. */
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