Index: uspace/lib/c/arch/sparc32/include/libarch/atomic.h
===================================================================
--- uspace/lib/c/arch/sparc32/include/libarch/atomic.h	(revision 679dc0c9c223ca3698970cbe869686a2c72637b8)
+++ uspace/lib/c/arch/sparc32/include/libarch/atomic.h	(revision bf677f61602c7e4b3c7a120fa84b7c59bef4627b)
@@ -38,7 +38,61 @@
 #define LIBC_ARCH_ATOMIC_H_
 
+#define	CAS
+
 #include <atomicdflt.h>
 #include <sys/types.h>
 
+static inline bool cas(atomic_t *val, atomic_count_t ov, atomic_count_t nv)
+{
+	if (val->count == ov) {
+		val->count = nv;
+		return true;
+	}
+	
+	return false;
+}
+
+static inline void atomic_inc(atomic_t *val) {
+	/* On real hardware the increment has to be done
+	   as an atomic action. */
+	
+	val->count++;
+}
+
+static inline void atomic_dec(atomic_t *val) {
+	/* On real hardware the decrement has to be done
+	   as an atomic action. */
+	
+	val->count++;
+}
+
+static inline atomic_count_t atomic_postinc(atomic_t *val)
+{
+	/* On real hardware both the storing of the previous
+	   value and the increment have to be done as a single
+	   atomic action. */
+	
+	atomic_count_t prev = val->count;
+	
+	val->count++;
+	return prev;
+}
+
+static inline atomic_count_t atomic_postdec(atomic_t *val)
+{
+	/* On real hardware both the storing of the previous
+	   value and the decrement have to be done as a single
+	   atomic action. */
+	
+	atomic_count_t prev = val->count;
+	
+	val->count--;
+	return prev;
+}
+
+#define atomic_preinc(val) (atomic_postinc(val) + 1)
+#define atomic_predec(val) (atomic_postdec(val) - 1)
+
+#if 0
 /** Atomic add operation.
  *
@@ -102,4 +156,5 @@
 	(void) atomic_add(val, -1);
 }
+#endif
 
 #endif
Index: uspace/lib/c/arch/sparc32/include/libarch/syscall.h
===================================================================
--- uspace/lib/c/arch/sparc32/include/libarch/syscall.h	(revision 679dc0c9c223ca3698970cbe869686a2c72637b8)
+++ uspace/lib/c/arch/sparc32/include/libarch/syscall.h	(revision bf677f61602c7e4b3c7a120fa84b7c59bef4627b)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup libcsparc64
+/** @addtogroup libcsparc32
  * @{
  */
@@ -33,6 +33,6 @@
  */
 
-#ifndef LIBC_sparc64_SYSCALL_H_
-#define LIBC_sparc64_SYSCALL_H_
+#ifndef LIBC_sparc32_SYSCALL_H_
+#define LIBC_sparc32_SYSCALL_H_
 
 #include <sys/types.h>
Index: uspace/lib/c/arch/sparc32/src/fibril.S
===================================================================
--- uspace/lib/c/arch/sparc32/src/fibril.S	(revision 679dc0c9c223ca3698970cbe869686a2c72637b8)
+++ uspace/lib/c/arch/sparc32/src/fibril.S	(revision bf677f61602c7e4b3c7a120fa84b7c59bef4627b)
@@ -39,5 +39,5 @@
 	# should a thread switch occur.
 	#
-# XXX	CONTEXT_SAVE_ARCH_CORE %o0
+	CONTEXT_SAVE_ARCH_CORE %o0
 	retl
 	mov 1, %o0		! context_save_arch returns 1
@@ -53,5 +53,5 @@
 #	flushw
 	
-# XXX	CONTEXT_RESTORE_ARCH_CORE %o0
+	CONTEXT_RESTORE_ARCH_CORE %o0
 	retl
 	xor %o0, %o0, %o0	! context_restore_arch returns 0