Index: kernel/arch/abs32le/include/istate.h =================================================================== --- kernel/arch/abs32le/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/abs32le/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,15 +36,12 @@ #define KERN_abs32le_ISTATE_H_ +#include + #ifdef KERNEL -#include #include -#include #else /* KERNEL */ -#include - -#define NO_TRACE #define REQUIRES_EXTENT_MUTABLE(arg) #define WRITES(arg) Index: kernel/arch/abs32le/include/mm/frame.h =================================================================== --- kernel/arch/abs32le/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/abs32le/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,6 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL - #include @@ -46,6 +44,4 @@ extern void physmem_print(void); -#endif /* KERNEL */ - #endif Index: kernel/arch/abs32le/include/mm/page.h =================================================================== --- kernel/arch/abs32le/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/abs32le/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,6 +41,4 @@ #define PAGE_WIDTH FRAME_WIDTH #define PAGE_SIZE FRAME_SIZE - -#ifdef KERNEL #define KA2PA(x) (((uintptr_t) (x)) - UINT32_C(0x80000000)) @@ -178,6 +176,4 @@ extern void page_fault(unsigned int, istate_t *); -#endif /* KERNEL */ - #endif Index: kernel/arch/abs32le/src/userspace.c =================================================================== --- kernel/arch/abs32le/src/userspace.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/abs32le/src/userspace.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,7 +36,6 @@ #include #include -#include +#include #include - void userspace(uspace_arg_t *kernel_uarg) Index: kernel/arch/amd64/include/asm.h =================================================================== --- kernel/arch/amd64/include/asm.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/include/asm.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,4 +41,6 @@ #include +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + /** Return base address of current stack. * @@ -87,13 +89,16 @@ NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) { - uint8_t val; - - asm volatile ( - "inb %w[port], %b[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + uint8_t val; + + asm volatile ( + "inb %w[port], %b[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint8_t) *port; } @@ -108,13 +113,16 @@ NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) { - uint16_t val; - - asm volatile ( - "inw %w[port], %w[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + uint16_t val; + + asm volatile ( + "inw %w[port], %w[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint16_t) *port; } @@ -129,13 +137,16 @@ NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) { - uint32_t val; - - asm volatile ( - "inl %w[port], %[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + uint32_t val; + + asm volatile ( + "inl %w[port], %[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint32_t) *port; } @@ -150,9 +161,11 @@ NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) { - asm volatile ( - "outb %b[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outb %b[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } @@ -167,9 +180,11 @@ NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) { - asm volatile ( - "outw %w[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outw %w[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } @@ -184,9 +199,11 @@ NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) { - asm volatile ( - "outl %[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outl %[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } Index: kernel/arch/amd64/include/context.h =================================================================== --- kernel/arch/amd64/include/context.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/include/context.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,6 +36,4 @@ #define KERN_amd64_CONTEXT_H_ -#ifdef KERNEL - #include @@ -52,6 +50,4 @@ (c)->rbp = 0; \ } while (0) - -#endif /* KERNEL */ /* We include only registers that must be preserved Index: kernel/arch/amd64/include/istate.h =================================================================== --- kernel/arch/amd64/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,16 +36,5 @@ #define KERN_amd64_ISTATE_H_ -#ifdef KERNEL - -#include #include - -#else /* KERNEL */ - -#include - -#define NO_TRACE - -#endif /* KERNEL */ /** This is passed to interrupt handlers */ Index: kernel/arch/amd64/include/mm/frame.h =================================================================== --- kernel/arch/amd64/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -49,5 +48,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/amd64/include/mm/page.h =================================================================== --- kernel/arch/amd64/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -50,6 +50,4 @@ #define PAGE_WIDTH FRAME_WIDTH #define PAGE_SIZE FRAME_SIZE - -#ifdef KERNEL #ifndef __ASM__ @@ -231,6 +229,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/amd64/src/userspace.c =================================================================== --- kernel/arch/amd64/src/userspace.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/amd64/src/userspace.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -38,7 +38,6 @@ #include #include -#include +#include #include - /** Enter userspace Index: kernel/arch/arm32/include/istate.h =================================================================== --- kernel/arch/arm32/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -35,13 +35,15 @@ #define KERN_arm32_ISTATE_H_ +#include + +#ifdef KERNEL + #include -#ifdef KERNEL -#include -#include -#else -#include -#define NO_TRACE -#endif +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ /** Struct representing CPU state saved when an exception occurs. */ Index: kernel/arch/arm32/include/mm/frame.h =================================================================== --- kernel/arch/arm32/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -40,5 +40,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -69,5 +68,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/arm32/include/mm/page.h =================================================================== --- kernel/arch/arm32/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -52,6 +52,4 @@ # define PA2KA(x) ((x) + 0x80000000) #endif - -#ifdef KERNEL /* Number of entries in each level. */ @@ -320,6 +318,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/arm32/include/regutils.h =================================================================== --- kernel/arch/arm32/include/regutils.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/include/regutils.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -30,5 +30,5 @@ * @{ */ -/** +/** * @file * @brief Utilities for convenient manipulation with ARM registers. @@ -38,52 +38,49 @@ #define KERN_arm32_REGUTILS_H_ -#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) -#define STATUS_REG_MODE_MASK 0x1f +#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) +#define STATUS_REG_MODE_MASK 0x1f -#define CP15_R1_HIGH_VECTORS_BIT (1 << 13) - +#define CP15_R1_HIGH_VECTORS_BIT (1 << 13) /* ARM Processor Operation Modes */ -#define USER_MODE 0x10 -#define FIQ_MODE 0x11 -#define IRQ_MODE 0x12 -#define SUPERVISOR_MODE 0x13 -#define ABORT_MODE 0x17 -#define UNDEFINED_MODE 0x1b -#define SYSTEM_MODE 0x1f +#define USER_MODE 0x10 +#define FIQ_MODE 0x11 +#define IRQ_MODE 0x12 +#define SUPERVISOR_MODE 0x13 +#define ABORT_MODE 0x17 +#define UNDEFINED_MODE 0x1b +#define SYSTEM_MODE 0x1f /* [CS]PRS manipulation macros */ -#define GEN_STATUS_READ(nm,reg) \ -static inline uint32_t nm## _status_reg_read(void) \ -{ \ - uint32_t retval; \ - asm volatile( \ - "mrs %[retval], " #reg \ - : [retval] "=r" (retval) \ - ); \ - return retval; \ -} +#define GEN_STATUS_READ(nm, reg) \ + static inline uint32_t nm## _status_reg_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mrs %[retval], " #reg \ + : [retval] "=r" (retval) \ + ); \ + \ + return retval; \ + } -#define GEN_STATUS_WRITE(nm,reg,fieldname, field) \ -static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ -{ \ - asm volatile( \ - "msr " #reg "_" #field ", %[value]" \ - :: [value] "r" (value) \ - ); \ -} +#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \ + static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ + { \ + asm volatile ( \ + "msr " #reg "_" #field ", %[value]" \ + :: [value] "r" (value) \ + ); \ + } +/** Return the value of CPSR (Current Program Status Register). */ +GEN_STATUS_READ(current, cpsr); -/** Returns the value of CPSR (Current Program Status Register). */ -GEN_STATUS_READ(current, cpsr) - - -/** Sets control bits of CPSR. */ +/** Set control bits of CPSR. */ GEN_STATUS_WRITE(current, cpsr, control, c); - -/** Returns the value of SPSR (Saved Program Status Register). */ -GEN_STATUS_READ(saved, spsr) - +/** Return the value of SPSR (Saved Program Status Register). */ +GEN_STATUS_READ(saved, spsr); #endif Index: kernel/arch/arm32/src/arm32.c =================================================================== --- kernel/arch/arm32/src/arm32.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/src/arm32.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -37,5 +37,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/arm32/src/mach/gta02/gta02.c =================================================================== --- kernel/arch/arm32/src/mach/gta02/gta02.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/src/mach/gta02/gta02.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c =================================================================== --- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -48,5 +48,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/arm32/src/mach/testarm/testarm.c =================================================================== --- kernel/arch/arm32/src/mach/testarm/testarm.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/arm32/src/mach/testarm/testarm.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -38,5 +38,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/ia32/Makefile.inc =================================================================== --- kernel/arch/ia32/Makefile.inc (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/Makefile.inc (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -43,4 +43,8 @@ ## Accepted CPUs # + +ifeq ($(PROCESSOR),i486) + CMN2 = -march=i486 +endif ifeq ($(PROCESSOR),athlon_xp) Index: kernel/arch/ia32/include/asm.h =================================================================== --- kernel/arch/ia32/include/asm.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/asm.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -101,4 +101,6 @@ GEN_WRITE_REG(dr7) +#define IO_SPACE_BOUNDARY ((void *) (64 * 1024)) + /** Byte to port * @@ -111,9 +113,11 @@ NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) { - asm volatile ( - "outb %b[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport8_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outb %b[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } @@ -128,9 +132,11 @@ NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) { - asm volatile ( - "outw %w[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport16_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outw %w[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } @@ -145,9 +151,11 @@ NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) { - asm volatile ( - "outl %[val], %w[port]\n" - :: [val] "a" (val), - [port] "d" (port) - ); + if (port < (ioport32_t *) IO_SPACE_BOUNDARY) { + asm volatile ( + "outl %[val], %w[port]\n" + :: [val] "a" (val), [port] "d" (port) + ); + } else + *port = val; } @@ -162,13 +170,16 @@ NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) { - uint8_t val; - - asm volatile ( - "inb %w[port], %b[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint8_t val; + + asm volatile ( + "inb %w[port], %b[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint8_t) *port; } @@ -183,13 +194,16 @@ NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) { - uint16_t val; - - asm volatile ( - "inw %w[port], %w[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint16_t val; + + asm volatile ( + "inw %w[port], %w[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint16_t) *port; } @@ -204,13 +218,16 @@ NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) { - uint32_t val; - - asm volatile ( - "inl %w[port], %[val]\n" - : [val] "=a" (val) - : [port] "d" (port) - ); - - return val; + if (((void *)port) < IO_SPACE_BOUNDARY) { + uint32_t val; + + asm volatile ( + "inl %w[port], %[val]\n" + : [val] "=a" (val) + : [port] "d" (port) + ); + + return val; + } else + return (uint32_t) *port; } @@ -311,4 +328,6 @@ } +#ifndef PROCESSOR_i486 + /** Write to MSR */ NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) @@ -335,4 +354,6 @@ return ((uint64_t) dx << 32) | ax; } + +#endif /* PROCESSOR_i486 */ Index: kernel/arch/ia32/include/atomic.h =================================================================== --- kernel/arch/ia32/include/atomic.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/atomic.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -121,5 +121,7 @@ asm volatile ( "0:\n" +#ifndef PROCESSOR_i486 "pause\n" /* Pentium 4's HT love this instruction */ +#endif "mov %[count], %[tmp]\n" "testl %[tmp], %[tmp]\n" Index: kernel/arch/ia32/include/boot/boot.h =================================================================== --- kernel/arch/ia32/include/boot/boot.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/boot/boot.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -43,4 +43,6 @@ #define MULTIBOOT_HEADER_FLAGS 0x00010003 +#define MULTIBOOT_LOADER_MAGIC 0x2BADB002 + #ifndef __ASM__ Index: kernel/arch/ia32/include/context.h =================================================================== --- kernel/arch/ia32/include/context.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/context.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,6 +36,4 @@ #define KERN_ia32_CONTEXT_H_ -#ifdef KERNEL - #include @@ -57,6 +55,4 @@ } while (0) -#endif /* KERNEL */ - /* * Only save registers that must be preserved across Index: kernel/arch/ia32/include/cycle.h =================================================================== --- kernel/arch/ia32/include/cycle.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/cycle.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -40,4 +40,7 @@ NO_TRACE static inline uint64_t get_cycle(void) { +#ifdef PROCESSOR_i486 + return 0; +#else uint64_t v; @@ -48,4 +51,5 @@ return v; +#endif } Index: kernel/arch/ia32/include/elf.h =================================================================== --- kernel/arch/ia32/include/elf.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/elf.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -27,5 +27,5 @@ */ -/** @addtogroup ia32 +/** @addtogroup ia32 * @{ */ @@ -36,7 +36,7 @@ #define KERN_ia32_ELF_H_ -#define ELF_MACHINE EM_386 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS32 +#define ELF_MACHINE EM_386 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS32 #endif Index: kernel/arch/ia32/include/istate.h =================================================================== --- kernel/arch/ia32/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,16 +36,5 @@ #define KERN_ia32_ISTATE_H_ -#ifdef KERNEL - -#include #include - -#else /* KERNEL */ - -#include - -#define NO_TRACE - -#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/ia32/include/mm/frame.h =================================================================== --- kernel/arch/ia32/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -50,5 +49,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/ia32/include/mm/page.h =================================================================== --- kernel/arch/ia32/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -42,6 +42,4 @@ #define PAGE_SIZE FRAME_SIZE -#ifdef KERNEL - #ifndef __ASM__ @@ -201,6 +199,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/ia32/src/asm.S =================================================================== --- kernel/arch/ia32/src/asm.S (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/asm.S (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -405,5 +405,11 @@ xorl %eax, %eax cmpl $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%esp) +#ifdef PROCESSOR_i486 + jz 0f + movl %eax, %ebp + 0: +#else cmovnzl %eax, %ebp +#endif movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp) Index: kernel/arch/ia32/src/boot/boot.S =================================================================== --- kernel/arch/ia32/src/boot/boot.S (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/boot/boot.S (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -97,4 +97,10 @@ pm_status $status_prot +#include "vesa_prot.inc" + +#ifndef PROCESSOR_i486 + + pm_status $status_prot2 + movl $(INTEL_CPUID_LEVEL), %eax cpuid @@ -105,16 +111,20 @@ cpuid bt $(INTEL_PSE), %edx - jc pse_supported + jnc pse_unsupported + + /* Map kernel and turn paging on */ + pm_status $status_pse + call map_kernel_pse + jmp stack_init + +#endif /* PROCESSOR_i486 */ pse_unsupported: - pm_error $err_pse - - pse_supported: - -#include "vesa_prot.inc" - - /* Map kernel and turn paging on */ - call map_kernel + /* Map kernel and turn paging on */ + pm_status $status_non_pse + call map_kernel + + stack_init: /* Create the first stack frame */ @@ -122,5 +132,5 @@ movl %esp, %ebp - pm2_status $status_prot2 + pm2_status $status_prot3 /* Call arch_pre_main(grub_eax, grub_ebx) */ @@ -140,5 +150,5 @@ jmp hlt0 -/** Setup mapping for the kernel. +/** Setup mapping for the kernel (PSE variant) * * Setup mapping for both the unmapped and mapped sections @@ -146,6 +156,7 @@ * */ -.global map_kernel -map_kernel: +.global map_kernel_pse +map_kernel_pse: + /* Paging features */ movl %cr4, %ecx orl $(1 << 4), %ecx /* PSE on */ @@ -158,5 +169,5 @@ xorl %ebx, %ebx - floop: + floop_pse: movl $((1 << 7) | (1 << 1) | (1 << 0)), %eax orl %ebx, %eax @@ -169,5 +180,5 @@ incl %ecx cmpl $512, %ecx - jl floop + jl floop_pse movl %esi, %cr3 @@ -177,4 +188,179 @@ movl %ebx, %cr0 ret + +/** Setup mapping for the kernel (non-PSE variant). + * + * Setup mapping for both the unmapped and mapped sections + * of the kernel. For simplicity, we map the entire 4G space. + * + */ +.global map_kernel +map_kernel: + /* Paging features */ + movl %cr4, %ecx + andl $(~(1 << 5)), %ecx /* PAE off */ + movl %ecx, %cr4 + + call calc_kernel_end + call find_mem_for_pt + + mov kernel_end, %esi + mov free_area, %ecx + + cmpl %esi, %ecx + jbe use_kernel_end + + mov %ecx, %esi + + /* Align address down to 4k */ + andl $(~4095), %esi + + use_kernel_end: + + /* Align address to 4k */ + addl $4095, %esi + andl $(~4095), %esi + + /* Allocate space for page tables */ + movl %esi, pt_loc + movl $ballocs, %edi + andl $0x7fffffff, %edi + + movl %esi, (%edi) + addl $4, %edi + movl $(2 * 1024 * 1024), (%edi) + + /* Fill page tables */ + xorl %ecx, %ecx + xorl %ebx, %ebx + + floop_pt: + movl $((1 << 1) | (1 << 0)), %eax + orl %ebx, %eax + movl %eax, (%esi, %ecx, 4) + addl $(4 * 1024), %ebx + + incl %ecx + cmpl $(512 * 1024), %ecx + + jl floop_pt + + /* Fill page directory */ + movl $(page_directory + 0), %esi + movl $(page_directory + 2048), %edi + xorl %ecx, %ecx + movl pt_loc, %ebx + + floop: + movl $((1 << 1) | (1 << 0)), %eax + orl %ebx, %eax + + /* Mapping 0x00000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */ + movl %eax, (%esi, %ecx, 4) + + /* Mapping 0x80000000 + %ecx * 4M => 0x00000000 + %ecx * 4M */ + movl %eax, (%edi, %ecx, 4) + addl $(4 * 1024), %ebx + + incl %ecx + cmpl $512, %ecx + + jl floop + + movl %esi, %cr3 + + movl %cr0, %ebx + orl $(1 << 31), %ebx /* paging on */ + movl %ebx, %cr0 + + ret + +/** Calculate unmapped address of the end of the kernel. */ +calc_kernel_end: + movl $hardcoded_load_address, %edi + andl $0x7fffffff, %edi + movl (%edi), %esi + andl $0x7fffffff, %esi + + movl $hardcoded_ktext_size, %edi + andl $0x7fffffff, %edi + addl (%edi), %esi + andl $0x7fffffff, %esi + + movl $hardcoded_kdata_size, %edi + andl $0x7fffffff, %edi + addl (%edi), %esi + andl $0x7fffffff, %esi + movl %esi, kernel_end + + ret + +/** Find free 2M (+4k for alignment) region where to store page tables */ +find_mem_for_pt: + /* Check if multiboot info is present */ + cmpl $MULTIBOOT_LOADER_MAGIC, grub_eax + je check_multiboot_map + + ret + + check_multiboot_map: + + /* Copy address of the multiboot info to ebx */ + movl grub_ebx, %ebx + + /* Check if memory map flag is present */ + movl (%ebx), %edx + andl $(1 << 6), %edx + jnz use_multiboot_map + + ret + + use_multiboot_map: + + /* Copy address of the memory map to edx */ + movl 48(%ebx), %edx + movl %edx, %ecx + + addl 44(%ebx), %ecx + + /* Find a free region at least 2M in size */ + check_memmap_loop: + + /* Is this a free region? */ + cmp $1, 20(%edx) + jnz next_region + + /* Check size */ + cmp $0, 16(%edx) + jnz next_region + + cmpl $(2 * 1024 * 1024 + 4 * 1024), 12(%edx) + jbe next_region + + cmp $0, 8(%edx) + jz found_region + + next_region: + + cmp %ecx, %edx + jbe next_region_do + + ret + + next_region_do: + + addl (%edx), %edx + addl $4, %edx + jmp check_memmap_loop + + found_region: + + /* Use end of the found region */ + mov 4(%edx), %ecx + add 12(%edx), %ecx + sub $(2 * 1024 * 1024), %ecx + mov %ecx, free_area + + ret /** Print string to EGA display (in light red) and halt. @@ -521,13 +707,20 @@ grub_eax: .long 0 - grub_ebx: .long 0 -err_pse: - .asciz "Page Size Extension not supported. System halted." +pt_loc: + .long 0 +kernel_end: + .long 0 +free_area: + .long 0 status_prot: .asciz "[prot] " +status_pse: + .asciz "[pse] " +status_non_pse: + .asciz "[non_pse] " status_vesa_copy: .asciz "[vesa_copy] " @@ -538,4 +731,6 @@ status_prot2: .asciz "[prot2] " +status_prot3: + .asciz "[prot3] " status_main: .asciz "[main] " Index: kernel/arch/ia32/src/cpu/cpu.c =================================================================== --- kernel/arch/ia32/src/cpu/cpu.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/cpu/cpu.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -118,9 +118,11 @@ ); } - + +#ifndef PROCESSOR_i486 if (CPU->arch.fi.bits.sep) { /* Setup fast SYSENTER/SYSEXIT syscalls */ syscall_setup_cpu(); } +#endif } Index: kernel/arch/ia32/src/drivers/vesa.c =================================================================== --- kernel/arch/ia32/src/drivers/vesa.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/drivers/vesa.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -38,5 +38,4 @@ #include -#include #include #include Index: kernel/arch/ia32/src/proc/scheduler.c =================================================================== --- kernel/arch/ia32/src/proc/scheduler.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/proc/scheduler.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -60,8 +60,10 @@ uintptr_t kstk = (uintptr_t) &THREAD->kstack[STACK_SIZE]; +#ifndef PROCESSOR_i486 if (CPU->arch.fi.bits.sep) { /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */ write_msr(IA32_MSR_SYSENTER_ESP, kstk - sizeof(istate_t)); } +#endif /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */ Index: kernel/arch/ia32/src/smp/smp.c =================================================================== --- kernel/arch/ia32/src/smp/smp.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/smp/smp.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -42,5 +42,4 @@ #include #include -#include #include #include Index: kernel/arch/ia32/src/syscall.c =================================================================== --- kernel/arch/ia32/src/syscall.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/syscall.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,4 +39,6 @@ #include +#ifndef PROCESSOR_i486 + /** Enable & setup support for SYSENTER/SYSEXIT */ void syscall_setup_cpu(void) @@ -50,4 +52,6 @@ } +#endif /* PROCESSOR_i486 */ + /** @} */ Index: kernel/arch/ia32/src/userspace.c =================================================================== --- kernel/arch/ia32/src/userspace.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia32/src/userspace.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -37,7 +37,6 @@ #include #include -#include +#include #include - /** Enter userspace Index: kernel/arch/ia64/include/elf.h =================================================================== --- kernel/arch/ia64/include/elf.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/include/elf.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -27,5 +27,5 @@ */ -/** @addtogroup ia64 +/** @addtogroup ia64 * @{ */ @@ -36,7 +36,7 @@ #define KERN_ia64_ELF_H_ -#define ELF_MACHINE EM_IA_64 -#define ELF_DATA_ENCODING ELFDATA2LSB -#define ELF_CLASS ELFCLASS64 +#define ELF_MACHINE EM_IA_64 +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS64 #endif Index: kernel/arch/ia64/include/istate.h =================================================================== --- kernel/arch/ia64/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,13 +36,15 @@ #define KERN_ia64_ISTATE_H_ +#include + +#ifdef KERNEL + #include -#ifdef KERNEL -#include -#include -#else -#include -#define NO_TRACE -#endif +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/ia64/include/mm/frame.h =================================================================== --- kernel/arch/ia64/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -50,5 +49,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/ia64/include/mm/page.h =================================================================== --- kernel/arch/ia64/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,6 +41,4 @@ #define PAGE_SIZE FRAME_SIZE #define PAGE_WIDTH FRAME_WIDTH - -#ifdef KERNEL /** Bit width of the TLB-locked portion of kernel address space. */ @@ -316,6 +314,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/ia64/include/register.h =================================================================== --- kernel/arch/ia64/include/register.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/include/register.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -61,6 +61,6 @@ #define PSR_CPL_MASK_SHIFTED 3 -#define PSR_RI_SHIFT 41 -#define PSR_RI_LEN 2 +#define PSR_RI_SHIFT 41 +#define PSR_RI_LEN 2 #define PFM_MASK (~0x3fffffffff) @@ -145,10 +145,4 @@ #ifndef __ASM__ -#ifdef KERNEL -#include -#else -#include -#endif - /** Processor Status Register. */ typedef union { Index: kernel/arch/ia64/src/ia64.c =================================================================== --- kernel/arch/ia64/src/ia64.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ia64/src/ia64.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -50,5 +50,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/mips32/include/context_offset.h =================================================================== --- kernel/arch/mips32/include/context_offset.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/include/context_offset.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -63,119 +63,126 @@ #ifdef __ASM__ +#ifdef KERNEL + #include -# ctx: address of the structure with saved context +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ .macro CONTEXT_SAVE_ARCH_CORE ctx:req - sw $s0,OFFSET_S0(\ctx) - sw $s1,OFFSET_S1(\ctx) - sw $s2,OFFSET_S2(\ctx) - sw $s3,OFFSET_S3(\ctx) - sw $s4,OFFSET_S4(\ctx) - sw $s5,OFFSET_S5(\ctx) - sw $s6,OFFSET_S6(\ctx) - sw $s7,OFFSET_S7(\ctx) - sw $s8,OFFSET_S8(\ctx) - sw $gp,OFFSET_GP(\ctx) - + sw $s0, OFFSET_S0(\ctx) + sw $s1, OFFSET_S1(\ctx) + sw $s2, OFFSET_S2(\ctx) + sw $s3, OFFSET_S3(\ctx) + sw $s4, OFFSET_S4(\ctx) + sw $s5, OFFSET_S5(\ctx) + sw $s6, OFFSET_S6(\ctx) + sw $s7, OFFSET_S7(\ctx) + sw $s8, OFFSET_S8(\ctx) + sw $gp, OFFSET_GP(\ctx) + #ifndef KERNEL - sw $k1,OFFSET_TLS(\ctx) - + sw $k1, OFFSET_TLS(\ctx) + #ifdef CONFIG_FPU - mfc1 $t0,$20 + mfc1 $t0, $20 sw $t0, OFFSET_F20(\ctx) - - mfc1 $t0,$21 + + mfc1 $t0, $21 sw $t0, OFFSET_F21(\ctx) - - mfc1 $t0,$22 + + mfc1 $t0, $22 sw $t0, OFFSET_F22(\ctx) - - mfc1 $t0,$23 + + mfc1 $t0, $23 sw $t0, OFFSET_F23(\ctx) - - mfc1 $t0,$24 + + mfc1 $t0, $24 sw $t0, OFFSET_F24(\ctx) - - mfc1 $t0,$25 + + mfc1 $t0, $25 sw $t0, OFFSET_F25(\ctx) - - mfc1 $t0,$26 + + mfc1 $t0, $26 sw $t0, OFFSET_F26(\ctx) - - mfc1 $t0,$27 + + mfc1 $t0, $27 sw $t0, OFFSET_F27(\ctx) - - mfc1 $t0,$28 + + mfc1 $t0, $28 sw $t0, OFFSET_F28(\ctx) - - mfc1 $t0,$29 + + mfc1 $t0, $29 sw $t0, OFFSET_F29(\ctx) - mfc1 $t0,$30 + mfc1 $t0, $30 sw $t0, OFFSET_F30(\ctx) #endif /* CONFIG_FPU */ #endif /* KERNEL */ - - sw $ra,OFFSET_PC(\ctx) - sw $sp,OFFSET_SP(\ctx) + + sw $ra, OFFSET_PC(\ctx) + sw $sp, OFFSET_SP(\ctx) .endm -# ctx: address of the structure with saved context +/* ctx: address of the structure with saved context */ .macro CONTEXT_RESTORE_ARCH_CORE ctx:req - lw $s0,OFFSET_S0(\ctx) - lw $s1,OFFSET_S1(\ctx) - lw $s2,OFFSET_S2(\ctx) - lw $s3,OFFSET_S3(\ctx) - lw $s4,OFFSET_S4(\ctx) - lw $s5,OFFSET_S5(\ctx) - lw $s6,OFFSET_S6(\ctx) - lw $s7,OFFSET_S7(\ctx) - lw $s8,OFFSET_S8(\ctx) - lw $gp,OFFSET_GP(\ctx) + lw $s0, OFFSET_S0(\ctx) + lw $s1, OFFSET_S1(\ctx) + lw $s2, OFFSET_S2(\ctx) + lw $s3, OFFSET_S3(\ctx) + lw $s4, OFFSET_S4(\ctx) + lw $s5, OFFSET_S5(\ctx) + lw $s6, OFFSET_S6(\ctx) + lw $s7, OFFSET_S7(\ctx) + lw $s8, OFFSET_S8(\ctx) + lw $gp, OFFSET_GP(\ctx) #ifndef KERNEL - lw $k1,OFFSET_TLS(\ctx) - + lw $k1, OFFSET_TLS(\ctx) + #ifdef CONFIG_FPU lw $t0, OFFSET_F20(\ctx) - mtc1 $t0,$20 - + mtc1 $t0, $20 + lw $t0, OFFSET_F21(\ctx) - mtc1 $t0,$21 - + mtc1 $t0, $21 + lw $t0, OFFSET_F22(\ctx) - mtc1 $t0,$22 - + mtc1 $t0, $22 + lw $t0, OFFSET_F23(\ctx) - mtc1 $t0,$23 - + mtc1 $t0, $23 + lw $t0, OFFSET_F24(\ctx) - mtc1 $t0,$24 - + mtc1 $t0, $24 + lw $t0, OFFSET_F25(\ctx) - mtc1 $t0,$25 - + mtc1 $t0, $25 + lw $t0, OFFSET_F26(\ctx) - mtc1 $t0,$26 - + mtc1 $t0, $26 + lw $t0, OFFSET_F27(\ctx) - mtc1 $t0,$27 - + mtc1 $t0, $27 + lw $t0, OFFSET_F28(\ctx) - mtc1 $t0,$28 - + mtc1 $t0, $28 + lw $t0, OFFSET_F29(\ctx) - mtc1 $t0,$29 - + mtc1 $t0, $29 + lw $t0, OFFSET_F30(\ctx) - mtc1 $t0,$30 + mtc1 $t0, $30 #endif /* CONFIG_FPU */ #endif /* KERNEL */ - - lw $ra,OFFSET_PC(\ctx) - lw $sp,OFFSET_SP(\ctx) + + lw $ra, OFFSET_PC(\ctx) + lw $sp, OFFSET_SP(\ctx) .endm -#endif - +#endif /* __ASM__ */ #endif Index: kernel/arch/mips32/include/cp0.h =================================================================== --- kernel/arch/mips32/include/cp0.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/include/cp0.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,10 +36,4 @@ #define KERN_mips32_CP0_H_ -#ifdef KERNEL -#include -#else -#include -#endif - #define cp0_status_ie_enabled_bit (1 << 0) #define cp0_status_exl_exception_bit (1 << 1) @@ -49,33 +43,50 @@ #define cp0_status_fpu_bit (1 << 29) -#define cp0_status_im_shift 8 -#define cp0_status_im_mask 0xff00 +#define cp0_status_im_shift 8 +#define cp0_status_im_mask 0xff00 -#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) +#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) +#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) -#define fpu_cop_id 1 +#define fpu_cop_id 1 /* * Magic value for use in msim. */ -#define cp0_compare_value 100000 +#define cp0_compare_value 100000 -#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) -#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) -#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) -#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) +#define cp0_mask_all_int() \ + cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) -#define GEN_READ_CP0(nm,reg) static inline uint32_t cp0_ ##nm##_read(void) \ - { \ - uint32_t retval; \ - asm volatile ("mfc0 %0, $" #reg : "=r"(retval)); \ - return retval; \ - } +#define cp0_unmask_all_int() \ + cp0_status_write(cp0_status_read() | cp0_status_im_mask) -#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \ - { \ - asm volatile ("mtc0 %0, $" #reg : : "r"(val) ); \ - } +#define cp0_mask_int(it) \ + cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) + +#define cp0_unmask_int(it) \ + cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) + +#define GEN_READ_CP0(nm, reg) \ + static inline uint32_t cp0_ ##nm##_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mfc0 %0, $" #reg \ + : "=r"(retval) \ + ); \ + \ + return retval; \ + } + +#define GEN_WRITE_CP0(nm, reg) \ + static inline void cp0_ ##nm##_write(uint32_t val) \ + { \ + asm volatile ( \ + "mtc0 %0, $" #reg \ + :: "r"(val) \ + ); \ + } GEN_READ_CP0(index, 0); Index: kernel/arch/mips32/include/istate.h =================================================================== --- kernel/arch/mips32/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,13 +36,15 @@ #define KERN_mips32_ISTATE_H_ +#include + +#ifdef KERNEL + #include -#ifdef KERNEL -#include -#include -#else -#include -#define NO_TRACE -#endif +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/mips32/include/mm/frame.h =================================================================== --- kernel/arch/mips32/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -46,5 +45,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/mips32/include/mm/page.h =================================================================== --- kernel/arch/mips32/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -49,6 +49,4 @@ # define PA2KA(x) ((x) + 0x80000000) #endif - -#ifdef KERNEL /* @@ -188,6 +186,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/mips32/src/mips32.c =================================================================== --- kernel/arch/mips32/src/mips32.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips32/src/mips32.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,5 +41,5 @@ #include #include -#include +#include #include #include @@ -52,5 +52,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/mips64/include/context_offset.h =================================================================== --- kernel/arch/mips64/include/context_offset.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/include/context_offset.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -63,7 +63,15 @@ #ifdef __ASM__ +#ifdef KERNEL + #include -# ctx: address of the structure with saved context +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ .macro CONTEXT_SAVE_ARCH_CORE ctx:req sd $s0, OFFSET_S0(\ctx) @@ -121,5 +129,5 @@ .endm -# ctx: address of the structure with saved context +/* ctx: address of the structure with saved context */ .macro CONTEXT_RESTORE_ARCH_CORE ctx:req ld $s0, OFFSET_S0(\ctx) Index: kernel/arch/mips64/include/cp0.h =================================================================== --- kernel/arch/mips64/include/cp0.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/include/cp0.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -35,14 +35,4 @@ #ifndef KERN_mips64_CP0_H_ #define KERN_mips64_CP0_H_ - -#ifdef KERNEL - -#include - -#else - -#include - -#endif #define cp0_status_ie_enabled_bit (1 << 0) Index: kernel/arch/mips64/include/istate.h =================================================================== --- kernel/arch/mips64/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,17 +36,15 @@ #define KERN_mips64_ISTATE_H_ -#include +#include #ifdef KERNEL -#include -#include +#include -#else +#else /* KERNEL */ -#include -#define NO_TRACE +#include -#endif +#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/mips64/include/mm/frame.h =================================================================== --- kernel/arch/mips64/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -46,5 +45,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/mips64/include/mm/page.h =================================================================== --- kernel/arch/mips64/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -50,5 +50,4 @@ #endif -#ifdef KERNEL #ifndef __ASM__ @@ -56,5 +55,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/mips64/src/mips64.c =================================================================== --- kernel/arch/mips64/src/mips64.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/mips64/src/mips64.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,5 +41,5 @@ #include #include -#include +#include #include #include @@ -52,5 +52,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/ppc32/include/asm.h =================================================================== --- kernel/arch/ppc32/include/asm.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/asm.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -38,5 +38,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/ppc32/include/context_offset.h =================================================================== --- kernel/arch/ppc32/include/context_offset.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/context_offset.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -75,7 +75,16 @@ #ifdef __ASM__ -# include -# ctx: address of the structure with saved context +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ .macro CONTEXT_SAVE_ARCH_CORE ctx:req stw sp, OFFSET_SP(\ctx) @@ -102,5 +111,5 @@ .endm -# ctx: address of the structure with saved context +/* ctx: address of the structure with saved context */ .macro CONTEXT_RESTORE_ARCH_CORE ctx:req lwz sp, OFFSET_SP(\ctx) Index: kernel/arch/ppc32/include/cpu.h =================================================================== --- kernel/arch/ppc32/include/cpu.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/cpu.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,19 +36,4 @@ #define KERN_ppc32_CPU_H_ -/* MSR bits */ -#define MSR_DR (1 << 4) -#define MSR_IR (1 << 5) -#define MSR_PR (1 << 14) -#define MSR_EE (1 << 15) - -/* HID0 bits */ -#define HID0_STEN (1 << 24) -#define HID0_ICE (1 << 15) -#define HID0_DCE (1 << 14) -#define HID0_ICFI (1 << 11) -#define HID0_DCI (1 << 10) - -#ifndef __ASM__ - #include #include @@ -67,6 +52,4 @@ } -#endif /* __ASM__ */ - #endif Index: kernel/arch/ppc32/include/exception.h =================================================================== --- kernel/arch/ppc32/include/exception.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/exception.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -37,5 +37,5 @@ #include -#include +#include #include Index: kernel/arch/ppc32/include/istate.h =================================================================== --- kernel/arch/ppc32/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -36,7 +36,15 @@ #define KERN_ppc32_EXCEPTION_H_ -#include -#include #include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/ppc32/include/mm/frame.h =================================================================== --- kernel/arch/ppc32/include/mm/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/mm/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -63,5 +62,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ #endif Index: kernel/arch/ppc32/include/mm/page.h =================================================================== --- kernel/arch/ppc32/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,6 +41,4 @@ #define PAGE_WIDTH FRAME_WIDTH #define PAGE_SIZE FRAME_SIZE - -#ifdef KERNEL #ifndef __ASM__ @@ -181,6 +179,4 @@ #endif /* __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/ppc32/include/msr.h =================================================================== --- kernel/arch/ppc32/include/msr.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) +++ kernel/arch/ppc32/include/msr.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ppc32 + * @{ + */ +/** @file + */ + +#ifndef KERN_ppc32_MSR_H_ +#define KERN_ppc32_MSR_H_ + +/* MSR bits */ +#define MSR_DR (1 << 4) +#define MSR_IR (1 << 5) +#define MSR_PR (1 << 14) +#define MSR_EE (1 << 15) + +/* HID0 bits */ +#define HID0_STEN (1 << 24) +#define HID0_ICE (1 << 15) +#define HID0_DCE (1 << 14) +#define HID0_ICFI (1 << 11) +#define HID0_DCI (1 << 10) + +#endif + +/** @} + */ Index: kernel/arch/ppc32/src/asm.S =================================================================== --- kernel/arch/ppc32/src/asm.S (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/src/asm.S (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -28,5 +28,5 @@ #include -#include +#include .text Index: kernel/arch/ppc32/src/exception.S =================================================================== --- kernel/arch/ppc32/src/exception.S (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/src/exception.S (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -28,5 +28,5 @@ #include -#include +#include #include Index: kernel/arch/ppc32/src/ppc32.c =================================================================== --- kernel/arch/ppc32/src/ppc32.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/ppc32/src/ppc32.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -41,10 +41,10 @@ #include #include -#include +#include #include #include #include #include -#include +#include #include #include Index: kernel/arch/sparc64/include/barrier.h =================================================================== --- kernel/arch/sparc64/include/barrier.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/barrier.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -37,14 +37,4 @@ #include - -#ifdef KERNEL - -#include - -#else - -#include - -#endif /* Index: kernel/arch/sparc64/include/elf.h =================================================================== --- kernel/arch/sparc64/include/elf.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/elf.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -27,5 +27,5 @@ */ -/** @addtogroup sparc64 +/** @addtogroup sparc64 * @{ */ @@ -36,7 +36,7 @@ #define KERN_sparc64_ELF_H_ -#define ELF_MACHINE EM_SPARCV9 -#define ELF_DATA_ENCODING ELFDATA2MSB -#define ELF_CLASS ELFCLASS64 +#define ELF_MACHINE EM_SPARCV9 +#define ELF_DATA_ENCODING ELFDATA2MSB +#define ELF_CLASS ELFCLASS64 #endif Index: kernel/arch/sparc64/include/istate.h =================================================================== --- kernel/arch/sparc64/include/istate.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/istate.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -37,13 +37,15 @@ #define KERN_sparc64_ISTATE_H_ +#include + +#ifdef KERNEL + #include -#ifdef KERNEL -#include -#include -#else -#include -#define NO_TRACE -#endif +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ typedef struct istate { Index: kernel/arch/sparc64/include/mm/page.h =================================================================== --- kernel/arch/sparc64/include/mm/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/mm/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -54,6 +54,4 @@ #define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) -#ifdef KERNEL - #ifndef __ASM__ @@ -77,6 +75,4 @@ #endif /* !def __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/sparc64/include/mm/sun4u/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4u/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/mm/sun4u/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -52,5 +52,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -80,5 +79,4 @@ #endif -#endif #endif Index: kernel/arch/sparc64/include/mm/sun4v/frame.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/frame.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/mm/sun4v/frame.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -42,5 +42,4 @@ #define FRAME_SIZE (1 << FRAME_WIDTH) -#ifdef KERNEL #ifndef __ASM__ @@ -52,5 +51,4 @@ #endif -#endif #endif Index: kernel/arch/sparc64/include/mm/sun4v/page.h =================================================================== --- kernel/arch/sparc64/include/mm/sun4v/page.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/mm/sun4v/page.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -46,6 +46,4 @@ #define MMU_PAGES_PER_PAGE (1 << (PAGE_WIDTH - MMU_PAGE_WIDTH)) -#ifdef KERNEL - #ifndef __ASM__ @@ -69,6 +67,4 @@ #endif /* !def __ASM__ */ -#endif /* KERNEL */ - #endif Index: kernel/arch/sparc64/include/sun4v/regdef.h =================================================================== --- kernel/arch/sparc64/include/sun4v/regdef.h (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/include/sun4v/regdef.h (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -28,5 +28,5 @@ */ -/** @addtogroup sparc64 +/** @addtogroup sparc64 * @{ */ @@ -37,17 +37,8 @@ #define KERN_sparc64_sun4v_REGDEF_H_ -#define PSTATE_IE_BIT (1 << 1) -#define PSTATE_PRIV_BIT (1 << 2) -#define PSTATE_PEF_BIT (1 << 4) +#define TSTATE_CWP_MASK 0x1f -#define TSTATE_PSTATE_SHIFT 8 -#define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) -#define TSTATE_CWP_MASK 0x1f -#define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) - -#define WSTATE_NORMAL(n) (n) -#define WSTATE_OTHER(n) ((n) << 3) - -#define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) +#define WSTATE_NORMAL(n) (n) +#define WSTATE_OTHER(n) ((n) << 3) #endif Index: kernel/arch/sparc64/src/drivers/scr.c =================================================================== --- kernel/arch/sparc64/src/drivers/scr.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/src/drivers/scr.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -39,5 +39,5 @@ #include #include -#include +#include #include #include Index: kernel/arch/sparc64/src/smp/sun4u/smp.c =================================================================== --- kernel/arch/sparc64/src/smp/sun4u/smp.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/src/smp/sun4u/smp.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -42,5 +42,4 @@ #include #include -#include #include #include Index: kernel/arch/sparc64/src/smp/sun4v/smp.c =================================================================== --- kernel/arch/sparc64/src/smp/sun4v/smp.c (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/src/smp/sun4v/smp.c (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -45,5 +45,4 @@ #include #include -#include #include #include Index: kernel/arch/sparc64/src/sun4v/start.S =================================================================== --- kernel/arch/sparc64/src/sun4v/start.S (revision 86a34d3e4d287b5a98f96a5b7e0a0a001d5529f8) +++ kernel/arch/sparc64/src/sun4v/start.S (revision bd5f3b795b75802e7f957c9589605a904f7667df) @@ -30,4 +30,5 @@ #include #include +#include #include #include