Changeset bd48f4c in mainline for kernel/arch/arm32/src
- Timestamp:
- 2010-07-12T10:53:30Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bd11d3e
- Parents:
- c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- kernel/arch/arm32/src
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/asm.S
rc40e6ef rbd48f4c 1 # 2 #Copyright (c) 2007 Michal Kebrt3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2007 Michal Kebrt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 30 29 .text 31 30 … … 37 36 .global memcpy_from_uspace_failover_address 38 37 .global memcpy_to_uspace_failover_address 38 .global early_putchar 39 39 40 40 memsetb: … … 47 47 memcpy_from_uspace: 48 48 memcpy_to_uspace: 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 1: 56 cmp r2, #0 57 movne ip, #0 58 beq 3f 59 2: 60 ldrb r3, [ip, r1] 61 strb r3, [ip, r0] 62 add ip, ip, #1 63 cmp ip, r2 64 bne 2b 65 3: 66 mov r0, r5 67 ldmia sp!, {r4, r5, pc} 68 4: 69 add r3, r0, #3 70 bic r3, r3, #3 71 cmp r0, r3 72 bne 1b 73 movs r4, r2, lsr #2 74 moveq lr, r4 75 beq 6f 76 mov lr, #0 77 mov ip, lr 78 5: 79 ldr r3, [ip, r1] 80 add lr, lr, #1 81 cmp lr, r4 82 str r3, [ip, r0] 83 add ip, ip, #4 84 bne 5b 85 6: 86 ands r4, r2, #3 87 beq 3b 88 mov r3, lr, lsl #2 89 add r0, r3, r0 90 add ip, r3, r1 91 mov r2, #0 92 7: 93 ldrb r3, [r2, ip] 94 strb r3, [r2, r0] 95 add r2, r2, #1 96 cmp r2, r4 97 bne 7b 98 b 3b 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 56 1: 57 cmp r2, #0 58 movne ip, #0 59 beq 3f 60 61 2: 62 ldrb r3, [ip, r1] 63 strb r3, [ip, r0] 64 add ip, ip, #1 65 cmp ip, r2 66 bne 2b 67 68 3: 69 mov r0, r5 70 ldmia sp!, {r4, r5, pc} 71 72 4: 73 add r3, r0, #3 74 bic r3, r3, #3 75 cmp r0, r3 76 bne 1b 77 movs r4, r2, lsr #2 78 moveq lr, r4 79 beq 6f 80 mov lr, #0 81 mov ip, lr 82 83 5: 84 ldr r3, [ip, r1] 85 add lr, lr, #1 86 cmp lr, r4 87 str r3, [ip, r0] 88 add ip, ip, #4 89 bne 5b 90 91 6: 92 ands r4, r2, #3 93 beq 3b 94 mov r3, lr, lsl #2 95 add r0, r3, r0 96 add ip, r3, r1 97 mov r2, #0 98 99 7: 100 ldrb r3, [r2, ip] 101 strb r3, [r2, r0] 102 add r2, r2, #1 103 cmp r2, r4 104 bne 7b 105 b 3b 99 106 100 107 memcpy_from_uspace_failover_address: 101 108 memcpy_to_uspace_failover_address: 102 mov r0, #0 103 ldmia sp!, {r4, r5, pc} 109 mov r0, #0 110 ldmia sp!, {r4, r5, pc} 111 112 early_putchar: 113 mov pc, lr -
kernel/arch/arm32/src/exc_handler.S
rc40e6ef rbd48f4c 98 98 stmfd r13!, {r13, lr}^ 99 99 stmfd r13!, {r2} 100 101 # Stop stack traces here 102 mov fp, #0 103 100 104 b 2f 101 105 … … 123 127 stmfd r13!, {r2} 124 128 2: 125 # Stop stack traces here126 mov fp, #0127 129 .endm 128 130 -
kernel/arch/arm32/src/exception.c
rc40e6ef rbd48f4c 173 173 * @param istate Structure to be printed. 174 174 */ 175 void print_istate(istate_t *istate)175 void istate_decode(istate_t *istate) 176 176 { 177 printf("istate dump:\n"); 178 179 printf(" r0: %x r1: %x r2: %x r3: %x\n", 177 printf("r0 =%#0.8lx\tr1 =%#0.8lx\tr2 =%#0.8lx\tr3 =%#0.8lx\n", 180 178 istate->r0, istate->r1, istate->r2, istate->r3); 181 printf(" r4: %x r5: %x r6: %x r7: %x\n",179 printf("r4 =%#0.8lx\tr5 =%#0.8lx\tr6 =%#0.8lx\tr7 =%#0.8lx\n", 182 180 istate->r4, istate->r5, istate->r6, istate->r7); 183 printf(" r8: %x r8: %x r10: %x fp: %x\n",181 printf("r8 =%#0.8lx\tr9 =%#0.8lx\tr10=%#0.8lx\tfp =%#0.8lx\n", 184 182 istate->r8, istate->r9, istate->r10, istate->fp); 185 printf(" r12: %x sp: %x lr: %x spsr: %x\n",183 printf("r12=%#0.8lx\tsp =%#0.8lx\tlr =%#0.8lx\tspsr=%#0.8lx\n", 186 184 istate->r12, istate->sp, istate->lr, istate->spsr); 187 188 printf(" pc: %x\n", istate->pc);189 190 stack_trace_istate(istate);191 185 } 192 186 -
kernel/arch/arm32/src/mm/page.c
rc40e6ef rbd48f4c 27 27 */ 28 28 29 /** @addtogroup arm32mm 29 /** @addtogroup arm32mm 30 30 * @{ 31 31 */ -
kernel/arch/arm32/src/mm/page_fault.c
rc40e6ef rbd48f4c 183 183 if (ret == AS_PF_FAULT) { 184 184 fault_if_from_uspace(istate, "Page fault: %#x.", badvaddr); 185 print_istate(istate); 186 printf("page fault - pc: %x, va: %x, status: %x(%x), " 187 "access:%d\n", istate->pc, badvaddr, fsr.status, fsr, 188 access); 189 190 panic("Page fault."); 185 panic_memtrap(istate, access, badvaddr, "Page fault."); 191 186 } 192 187 } … … 203 198 204 199 if (ret == AS_PF_FAULT) { 205 printf("prefetch_abort\n"); 206 print_istate(istate); 207 panic("page fault - prefetch_abort at address: %x.", 208 istate->pc); 200 panic_memtrap(istate, PF_ACCESS_EXEC, istate->pc, 201 "Page fault - prefetch_abort."); 209 202 } 210 203 }
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