Index: arch/ia64/include/mm/page.h
===================================================================
--- arch/ia64/include/mm/page.h	(revision c7ec94a41807d5fd556f2d26b42c6b816b3da7c8)
+++ arch/ia64/include/mm/page.h	(revision bc78c75a60ca2f9fb760d1e865202265c1b49e35)
@@ -71,4 +71,11 @@
 #define AR_EXECUTE	0x1
 #define AR_WRITE	0x2
+
+
+#define VA_REGION_INDEX 61
+
+#define VA_REGION(va) (va>>VA_REGION_INDEX)
+
+
 
 struct vhpt_tag_info {
@@ -221,5 +228,9 @@
 {
 	ASSERT(i < REGION_REGISTERS);
-	__asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
+	__asm__ volatile (
+	"mov rr[%0] = %1;;\n" 
+	"srlz.d;;\n"
+	: 
+	: "r" (i), "r" (v));
 }
  
Index: arch/ia64/include/mm/tlb.h
===================================================================
--- arch/ia64/include/mm/tlb.h	(revision c7ec94a41807d5fd556f2d26b42c6b816b3da7c8)
+++ arch/ia64/include/mm/tlb.h	(revision bc78c75a60ca2f9fb760d1e865202265c1b49e35)
@@ -33,3 +33,15 @@
 #define tlb_print()
 
+
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <arch/register.h>
+
+
+void tlb_fill_data(__address va,asid_t asid,vhpt_entry_t entry);
+void tlb_fill_code(__address va,asid_t asid,vhpt_entry_t entry);
+
+
 #endif
+
+