Changeset bc78c75 in mainline for arch/ia64/include

Timestamp:

2006-02-08T17:15:56Z (20 years ago)

Author:

Jakub Vana <jakub.vana@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

89298e3

Parents:

4c8715d2

Message:

IA-64 TLB filling functions for dynamic tlb filling (TC tlb).

Location:

arch/ia64/include/mm

Files:

• page.h (modified) (2 diffs)
• tlb.h (modified) (1 diff)

arch/ia64/include/mm/page.h

@@ -71 +71 @@
 #define AR_EXECUTE      0x1
 #define AR_WRITE        0x2
+
+
+#define VA_REGION_INDEX 61
+
+#define VA_REGION(va) (va>>VA_REGION_INDEX)
+
+
 
 struct vhpt_tag_info {
@@ -221 +228 @@
 {
         ASSERT(i < REGION_REGISTERS);
-        __asm__ volatile ("mov rr[%0] = %1\n" : : "r" (i), "r" (v));
+        __asm__ volatile (
+        "mov rr[%0] = %1;;\n" 
+        "srlz.d;;\n"
+        : 
+        : "r" (i), "r" (v));
 }
  

arch/ia64/include/mm/tlb.h

@@ -33 +33 @@
 #define tlb_print()
 
+
+#include <arch/mm/page.h>
+#include <arch/mm/asid.h>
+#include <arch/register.h>
+
+
+void tlb_fill_data(__address va,asid_t asid,vhpt_entry_t entry);
+void tlb_fill_code(__address va,asid_t asid,vhpt_entry_t entry);
+
+
 #endif
+
+