Changeset bc1f1c2 in mainline for uspace/lib/libc/arch/ia32

Timestamp:

2007-06-28T00:54:12Z (18 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

12f91130

Parents:

b9641ee

Message:

Goodbye pseudo threads, welcome fibrils.
The renaming might still be incomplete.

Location:

uspace/lib/libc/arch/ia32

Files:

• Makefile.inc (modified) (1 diff)
• include/fibril.h (moved) (moved from uspace/lib/libc/arch/ia32/include/psthread.h ) (1 diff)
• include/thread.h (modified) (2 diffs)
• src/fibril.S (moved) (moved from uspace/lib/libc/arch/ia32/src/psthread.S ) (2 diffs)

uspace/lib/libc/arch/ia32/Makefile.inc

@@ -34 +34 @@
 
 ARCH_SOURCES += arch/$(ARCH)/src/syscall.c \
-                arch/$(ARCH)/src/psthread.S \
+                arch/$(ARCH)/src/fibril.S \
                 arch/$(ARCH)/src/thread.c
 

uspace/lib/libc/arch/ia32/include/fibril.h

@@ -33 +33 @@
  */
 
-#ifndef LIBC_ia32_PSTHREAD_H_
-#define LIBC_ia32_PSTHREAD_H_
+#ifndef LIBC_ia32_FIBRIL_H_
+#define LIBC_ia32_FIBRIL_H_
 
 #include <types.h>

uspace/lib/libc/arch/ia32/include/thread.h

@@ -40 +40 @@
 typedef struct {
         void *self;
-        void *pst_data;
+        void *fibril_data;
 } tcb_t;
 
@@ -50 +50 @@
 static inline tcb_t * __tcb_get(void)
 {
-        void * retval;
+        void *retval;
 
         asm ("movl %%gs:0, %0" : "=r"(retval));

uspace/lib/libc/arch/ia32/src/fibril.S

@@ -40 +40 @@
 context_save:
         movl 0(%esp),%eax       # the caller's return %eip
-        movl 4(%esp),%edx       # address of the kernel_context variable to save context to
+        movl 4(%esp),%edx       # address of the context variable to save context to
 
         movl %esp,0(%edx)       # %esp -> ctx->sp
@@ -64 +64 @@
 #
 context_restore:
-        movl 4(%esp),%eax       # address of the kernel_context variable to restore context from
+        movl 4(%esp),%eax       # address of the context variable to restore context from
         movl 0(%eax),%esp       # ctx->sp -> %esp
         movl 4(%eax),%edx       # ctx->pc -> %edx