Changeset bb97118 in mainline for uspace/drv/bus
- Timestamp:
- 2019-02-06T13:25:12Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- eb13ef8
- Parents:
- d066259
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-02 13:29:26)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-06 13:25:12)
- Location:
- uspace/drv/bus/usb
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/ohci/hc.c
rd066259 rbb97118 514 514 515 515 /* Enable interrupts */ 516 if ( CAP_HANDLE_VALID(instance->base.irq_handle)) {516 if (cap_handle_valid(instance->base.irq_handle)) { 517 517 OHCI_WR(instance->registers->interrupt_enable, 518 518 OHCI_USED_INTERRUPTS); -
uspace/drv/bus/usb/uhci/hc.c
rd066259 rbb97118 295 295 pio_write_32(®isters->flbaseadd, pa); 296 296 297 if ( CAP_HANDLE_VALID(instance->base.irq_handle)) {297 if (cap_handle_valid(instance->base.irq_handle)) { 298 298 /* Enable all interrupts, but resume interrupt */ 299 299 pio_write_16(&instance->registers->usbintr, -
uspace/drv/bus/usb/xhci/hc.c
rd066259 rbb97118 494 494 XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA, erstba_phys); 495 495 496 if ( CAP_HANDLE_VALID(hc->base.irq_handle)) {496 if (cap_handle_valid(hc->base.irq_handle)) { 497 497 XHCI_REG_SET(intr0, XHCI_INTR_IE, 1); 498 498 XHCI_REG_SET(hc->op_regs, XHCI_OP_INTE, 1);
Note:
See TracChangeset
for help on using the changeset viewer.
