Changeset b49f4ae in mainline for arch/mips/src
- Timestamp:
- 2005-09-06T09:56:26Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 50a4e25
- Parents:
- a5d1331
- Location:
- arch/mips/src
- Files:
-
- 2 edited
-
dummy.s (modified) (2 diffs)
-
fpu_context.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
arch/mips/src/dummy.s
ra5d1331 rb49f4ae 35 35 .global before_thread_runs_arch 36 36 .global dummy 37 .global fpu_enable 38 .global fpu_disable 39 .global fpu_init 37 40 38 41 before_thread_runs_arch: … … 40 43 calibrate_delay_loop: 41 44 asm_delay_loop: 45 fpu_enable: 46 fpu_disable: 47 fpu_init: 42 48 43 49 dummy: -
arch/mips/src/fpu_context.c
ra5d1331 rb49f4ae 39 39 } 40 40 41 42 void fpu_lazy_context_save(fpu_context_t *fctx)43 {44 }45 46 void fpu_lazy_context_restore(fpu_context_t *fctx)47 {48 }
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