- Timestamp:
- 2005-09-06T09:56:26Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 50a4e25
- Parents:
- a5d1331
- Location:
- arch/ia32
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/Makefile.inc
ra5d1331 rb49f4ae 8 8 9 9 10 DEFS:=-DARCH=$(ARCH) 10 DEFS:=-DARCH=$(ARCH) -DFPU_LAZY 11 11 12 12 ifdef SMP -
arch/ia32/Makefile.inc.cross
ra5d1331 rb49f4ae 8 8 LD=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-ld 9 9 OBJCOPY=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-objcopy 10 OBJDUMP=$(IA-32_BINUTILS_DIR)/$(IA-32_TARGET)-objdump 10 11 11 12 BFD_NAME=elf32-i386 12 13 BFD_ARCH=i386 13 14 14 DEFS:=-DARCH=$(ARCH) 15 DEFS:=-DARCH=$(ARCH) -DFPU_LAZY 15 16 16 17 ifdef SMP … … 25 26 CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Werror-implicit-function-declaration -Wmissing-prototypes -Werror -O3 26 27 LFLAGS=-M -no-check-sections 28 29 ../arch/$(ARCH)/_link.ld: ../arch/$(ARCH)/_link.ld.in 30 $(CC) $(CFLAGS) -E -x c $< | grep -v "^\#" > $@ 27 31 28 32 arch_sources= \ -
arch/ia32/include/cpu.h
ra5d1331 rb49f4ae 42 42 }; 43 43 44 45 void set_TS_flag(void);46 void reset_TS_flag(void);47 48 44 #endif -
arch/ia32/include/fpu_context.h
ra5d1331 rb49f4ae 38 38 39 39 40 41 40 #endif -
arch/ia32/src/cpu/cpu.c
ra5d1331 rb49f4ae 63 63 }; 64 64 65 void set_TS_flag(void)65 void fpu_disable(void) 66 66 { 67 asm 68 ( 67 __asm__ volatile ( 69 68 "mov %%cr0,%%eax;" 70 69 "or $8,%%eax;" … … 76 75 } 77 76 78 void reset_TS_flag(void)77 void fpu_enable(void) 79 78 { 80 asm 81 ( 79 __asm__ volatile ( 82 80 "mov %%cr0,%%eax;" 83 81 "and $0xffFFffF7,%%eax;" -
arch/ia32/src/fpu_context.c
ra5d1331 rb49f4ae 34 34 void fpu_context_save(fpu_context_t *fctx) 35 35 { 36 }37 38 39 void fpu_context_restore(fpu_context_t *fctx)40 {41 if (THREAD==CPU->fpu_owner)42 reset_TS_flag();43 else {44 set_TS_flag();45 if (CPU->fpu_owner != NULL)46 (CPU->fpu_owner)->fpu_context_engaged=1;47 }48 }49 50 51 void fpu_lazy_context_save(fpu_context_t *fctx)52 {53 36 __asm__ volatile ( 54 37 "fnsave %0" … … 57 40 } 58 41 59 void fpu_lazy_context_restore(fpu_context_t *fctx) 42 43 void fpu_context_restore(fpu_context_t *fctx) 60 44 { 61 45 __asm__ volatile ( -
arch/ia32/src/interrupt.c
ra5d1331 rb49f4ae 110 110 void nm_fault(__u8 n, __native stack[]) 111 111 { 112 reset_TS_flag(); 113 if (CPU->fpu_owner != NULL) { 114 fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context)); 115 CPU->fpu_owner->fpu_context_engaged=0; /* don't prevent migration */ 116 } 117 if (THREAD->fpu_context_exists) 118 fpu_lazy_context_restore(&(THREAD->saved_fpu_context)); 119 else { 120 fpu_init(); 121 THREAD->fpu_context_exists=1; 122 } 123 CPU->fpu_owner=THREAD; 112 #ifdef FPU_LAZY 113 scheduler_fpu_lazy_request(); 114 #else 115 panic("fpu fault"); 116 #endif 124 117 } 125 118
Note:
See TracChangeset
for help on using the changeset viewer.