Changeset b3f8fb7 in mainline for kernel/arch/mips32/include
- Timestamp:
- 2007-01-28T13:25:49Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8e8c1a5
- Parents:
- 1ba41c5
- Location:
- kernel/arch/mips32/include
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/asm.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <typedefs.h>40 39 #include <config.h> 41 40 -
kernel/arch/mips32/include/cache.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_mips32_CACHE_H_ 37 37 38 #include < typedefs.h>38 #include <arch/exception.h> 39 39 40 40 extern void cache_error(istate_t *istate); -
kernel/arch/mips32/include/context_offset.h
r1ba41c5 rb3f8fb7 43 43 #define OFFSET_GP 0x2c 44 44 45 /* struct istate*/45 /* istate_t */ 46 46 #define EOFFSET_AT 0x0 47 47 #define EOFFSET_V0 0x4 -
kernel/arch/mips32/include/cp0.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <arch/mm/tlb.h>40 39 41 #define cp0_status_ie_enabled_bit (1 <<0)42 #define cp0_status_exl_exception_bit (1 <<1)43 #define cp0_status_erl_error_bit (1 <<2)44 #define cp0_status_um_bit (1 <<4)45 #define cp0_status_bev_bootstrap_bit (1 <<22)46 #define cp0_status_fpu_bit (1 <<29)40 #define cp0_status_ie_enabled_bit (1 << 0) 41 #define cp0_status_exl_exception_bit (1 << 1) 42 #define cp0_status_erl_error_bit (1 << 2) 43 #define cp0_status_um_bit (1 << 4) 44 #define cp0_status_bev_bootstrap_bit (1 << 22) 45 #define cp0_status_fpu_bit (1 << 29) 47 46 48 47 #define cp0_status_im_shift 8 … … 61 60 #define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) 62 61 #define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask) 63 #define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1 <<(cp0_status_im_shift+(it))))64 #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1 <<(cp0_status_im_shift+(it))))62 #define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) 63 #define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) 65 64 66 65 #define GEN_READ_CP0(nm,reg) static inline uint32_t cp0_ ##nm##_read(void) \ -
kernel/arch/mips32/include/cpu.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <arch/asm.h> 39 40 40 41 typedef struct { -
kernel/arch/mips32/include/debugger.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_mips32_DEBUGGER_H_ 37 37 38 #include <typedefs.h>39 38 #include <arch/exception.h> 40 39 #include <arch/types.h> -
kernel/arch/mips32/include/exception.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <typedefs.h>40 39 #include <arch/cp0.h> 41 40 … … 59 58 #define EXC_VCED 31 60 59 61 struct istate{60 typedef struct { 62 61 uint32_t at; 63 62 uint32_t v0; … … 96 95 uint32_t epc; /* cp0_epc */ 97 96 uint32_t k1; /* We use it as thread-local pointer */ 98 } ;97 } istate_t; 99 98 100 99 static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr) -
kernel/arch/mips32/include/interrupt.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_mips32_INTERRUPT_H_ 37 37 38 #include <typedefs.h> 38 39 #include <arch/exception.h> 39 40 -
kernel/arch/mips32/include/mm/as.h
r1ba41c5 rb3f8fb7 43 43 #define USER_ADDRESS_SPACE_END_ARCH (unsigned long) 0x7fffffff 44 44 45 #define USTACK_ADDRESS_ARCH (0x80000000 -PAGE_SIZE)45 #define USTACK_ADDRESS_ARCH (0x80000000 - PAGE_SIZE) 46 46 47 47 typedef struct { 48 48 } as_arch_t; 49 50 #include <genarch/mm/as_pt.h> 49 51 50 52 #define as_constructor_arch(as, flags) (as != as) -
kernel/arch/mips32/include/mm/page.h
r1ba41c5 rb3f8fb7 44 44 45 45 #ifndef __ASM__ 46 # 47 # 46 # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) 47 # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) 48 48 #else 49 # 50 # 49 # define KA2PA(x) ((x) - 0x80000000) 50 # define PA2KA(x) ((x) + 0x80000000) 51 51 #endif 52 52 … … 110 110 #ifndef __ASM__ 111 111 112 #include <arch/mm/tlb.h> 113 #include <mm/page.h> 114 #include <arch/mm/frame.h> 115 #include <arch/types.h> 112 #include <mm/mm.h> 113 #include <arch/exception.h> 116 114 117 115 static inline int get_pt_flags(pte_t *pt, index_t i) -
kernel/arch/mips32/include/mm/tlb.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/exception.h> 39 #include <typedefs.h>40 39 41 40 #ifdef TLBCNT … … 53 52 #define PAGE_CACHEABLE_EXC_WRITE 5 54 53 55 typedef union entry_lo entry_lo_t; 56 typedef union entry_hi entry_hi_t; 57 typedef union page_mask page_mask_t; 58 typedef union index tlb_index_t; 59 60 union entry_lo { 54 typedef union { 61 55 struct { 62 56 #ifdef BIG_ENDIAN … … 77 71 } __attribute__ ((packed)); 78 72 uint32_t value; 79 } ;73 } entry_lo_t; 80 74 81 /** Page Table Entry. */ 82 struct pte { 83 unsigned g : 1; /**< Global bit. */ 84 unsigned p : 1; /**< Present bit. */ 85 unsigned d : 1; /**< Dirty bit. */ 86 unsigned cacheable : 1; /**< Cacheable bit. */ 87 unsigned : 1; /**< Unused. */ 88 unsigned soft_valid : 1; /**< Valid content even if not present. */ 89 unsigned pfn : 24; /**< Physical frame number. */ 90 unsigned w : 1; /**< Page writable bit. */ 91 unsigned a : 1; /**< Accessed bit. */ 92 }; 93 94 union entry_hi { 75 typedef union { 95 76 struct { 96 77 #ifdef BIG_ENDIAN … … 105 86 } __attribute__ ((packed)); 106 87 uint32_t value; 107 } ;88 } entry_hi_t; 108 89 109 union page_mask{90 typedef union { 110 91 struct { 111 92 #ifdef BIG_ENDIAN … … 120 101 } __attribute__ ((packed)); 121 102 uint32_t value; 122 } ;103 } page_mask_t; 123 104 124 union index{105 typedef union { 125 106 struct { 126 107 #ifdef BIG_ENDIAN … … 135 116 } __attribute__ ((packed)); 136 117 uint32_t value; 137 } ;118 } tlb_index_t; 138 119 139 120 /** Probe TLB for Matching Entry -
kernel/arch/mips32/include/types.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_mips32_TYPES_H_ 37 37 38 #define NULL 0 38 #define NULL 0 39 #define false 0 40 #define true 1 39 41 40 42 typedef signed char int8_t; 41 typedef unsigned char uint8_t;42 43 43 typedef signed short int16_t; 44 typedef unsigned short uint16_t;45 46 typedef unsigned long uint32_t;47 44 typedef signed long int32_t; 48 49 typedef unsigned long long uint64_t;50 45 typedef signed long long int64_t; 51 46 47 typedef unsigned char uint8_t; 48 typedef unsigned short uint16_t; 49 typedef unsigned long uint32_t; 50 typedef unsigned long long uint64_t; 51 52 typedef uint32_t size_t; 53 typedef uint32_t count_t; 54 typedef uint32_t index_t; 55 52 56 typedef uint32_t uintptr_t; 57 typedef uint32_t pfn_t; 53 58 54 59 typedef uint32_t ipl_t; … … 57 62 typedef int32_t native_t; 58 63 59 typedef struct pte pte_t; 64 typedef uint8_t bool; 65 typedef uint64_t task_id_t; 66 typedef uint32_t context_id_t; 60 67 61 typedef uint32_t pfn_t; 68 typedef int32_t inr_t; 69 typedef int32_t devno_t; 70 71 /** Page Table Entry. */ 72 typedef struct { 73 unsigned g : 1; /**< Global bit. */ 74 unsigned p : 1; /**< Present bit. */ 75 unsigned d : 1; /**< Dirty bit. */ 76 unsigned cacheable : 1; /**< Cacheable bit. */ 77 unsigned : 1; /**< Unused. */ 78 unsigned soft_valid : 1; /**< Valid content even if not present. */ 79 unsigned pfn : 24; /**< Physical frame number. */ 80 unsigned w : 1; /**< Page writable bit. */ 81 unsigned a : 1; /**< Accessed bit. */ 82 } pte_t; 62 83 63 84 #endif
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