Changeset b3f8fb7 in mainline for kernel/arch/ia32/include
- Timestamp:
- 2007-01-28T13:25:49Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8e8c1a5
- Parents:
- 1ba41c5
- Location:
- kernel/arch/ia32/include
- Files:
-
- 14 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/atomic.h
r1ba41c5 rb3f8fb7 39 39 #include <arch/barrier.h> 40 40 #include <preemption.h> 41 #include <typedefs.h>42 41 43 42 static inline void atomic_inc(atomic_t *val) { -
kernel/arch/ia32/include/boot/memmap.h
r1ba41c5 rb3f8fb7 58 58 #include <arch/types.h> 59 59 60 struct e820memmap_{60 typedef struct { 61 61 uint64_t base_address; 62 62 uint64_t size; 63 63 uint32_t type; 64 } __attribute__ ((packed)) ;64 } __attribute__ ((packed)) e820memmap_t; 65 65 66 extern struct e820memmap_ e820table[MEMMAP_E820_MAX_RECORDS]; 67 66 extern e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; 68 67 extern uint8_t e820counter; 69 70 extern uint32_t e801memorysize; /**< Size of available memory in KB. */ 68 extern uint32_t e801memorysize; /**< Size of available memory in KB. */ 71 69 72 70 #endif -
kernel/arch/ia32/include/cpu.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_ia32_CPU_H_ 37 37 38 #include <typedefs.h>39 38 #include <arch/pm.h> 40 39 #include <arch/asm.h> -
kernel/arch/ia32/include/interrupt.h
r1ba41c5 rb3f8fb7 69 69 #define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2) 70 70 71 struct istate{71 typedef struct { 72 72 uint32_t eax; 73 73 uint32_t ecx; … … 88 88 uint32_t eflags; 89 89 uint32_t stack[]; 90 } ;90 } istate_t; 91 91 92 92 /** Return true if exception happened while in userspace */ -
kernel/arch/ia32/include/mm/as.h
r1ba41c5 rb3f8fb7 48 48 } as_arch_t; 49 49 50 #include <genarch/mm/as_pt.h> 51 50 52 #define as_constructor_arch(as, flags) (as != as) 51 53 #define as_destructor_arch(as) (as != as) -
kernel/arch/ia32/include/mm/asid.h
r1ba41c5 rb3f8fb7 43 43 #define KERN_ia32_ASID_H_ 44 44 45 typedef int asid_t; 45 #include <arch/types.h> 46 47 typedef int32_t asid_t; 46 48 47 49 #define ASID_MAX_ARCH 3 48 50 49 #define asid_get() (ASID_START +1)51 #define asid_get() (ASID_START + 1) 50 52 #define asid_put(asid) 51 53 -
kernel/arch/ia32/include/mm/memory_init.h
r1ba41c5 rb3f8fb7 37 37 #define KERN_ia32_MEMORY_INIT_H_ 38 38 39 #include <typedefs.h>40 41 39 size_t get_memory_size(void); 42 40 -
kernel/arch/ia32/include/mm/page.h
r1ba41c5 rb3f8fb7 62 62 #define PTL3_ENTRIES_ARCH 1024 63 63 64 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >>22)&0x3ff)64 #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) 65 65 #define PTL1_INDEX_ARCH(vaddr) 0 66 66 #define PTL2_INDEX_ARCH(vaddr) 0 67 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >>12)&0x3ff)67 #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) 68 68 69 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address) <<12))69 #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *)((((pte_t *)(ptl0))[(i)].frame_address) << 12)) 70 70 #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) 71 71 #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) 72 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)((((pte_t *)(ptl3))[(i)].frame_address) <<12))72 #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t)((((pte_t *)(ptl3))[(i)].frame_address) << 12)) 73 73 74 74 #define SET_PTL0_ADDRESS_ARCH(ptl0) (write_cr3((uintptr_t) (ptl0))) … … 90 90 #define PTE_VALID_ARCH(p) (*((uint32_t *) (p)) != 0) 91 91 #define PTE_PRESENT_ARCH(p) ((p)->present != 0) 92 #define PTE_GET_FRAME_ARCH(p) ((p)->frame_address <<FRAME_WIDTH)92 #define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH) 93 93 #define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0) 94 94 #define PTE_EXECUTABLE_ARCH(p) 1 … … 96 96 #ifndef __ASM__ 97 97 98 #include <mm/page.h> 99 #include <arch/types.h> 100 #include <arch/mm/frame.h> 101 #include <typedefs.h> 98 #include <mm/mm.h> 99 #include <arch/interrupt.h> 102 100 103 101 /* Page fault error codes. */ 104 102 105 103 /** When bit on this position is 0, the page fault was caused by a not-present page. */ 106 #define PFERR_CODE_P (1 <<0)104 #define PFERR_CODE_P (1 << 0) 107 105 108 106 /** When bit on this position is 1, the page fault was caused by a write. */ 109 #define PFERR_CODE_RW (1 <<1)107 #define PFERR_CODE_RW (1 << 1) 110 108 111 109 /** When bit on this position is 1, the page fault was caused in user mode. */ 112 #define PFERR_CODE_US (1 <<2)110 #define PFERR_CODE_US (1 << 2) 113 111 114 112 /** When bit on this position is 1, a reserved bit was set in page directory. */ 115 #define PFERR_CODE_RSVD (1<<3) 116 117 /** Page Table Entry. */ 118 struct page_specifier { 119 unsigned present : 1; 120 unsigned writeable : 1; 121 unsigned uaccessible : 1; 122 unsigned page_write_through : 1; 123 unsigned page_cache_disable : 1; 124 unsigned accessed : 1; 125 unsigned dirty : 1; 126 unsigned pat : 1; 127 unsigned global : 1; 128 unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ 129 unsigned avl : 2; 130 unsigned frame_address : 20; 131 } __attribute__ ((packed)); 113 #define PFERR_CODE_RSVD (1 << 3) 132 114 133 115 static inline int get_pt_flags(pte_t *pt, index_t i) … … 136 118 137 119 return ( 138 (!p->page_cache_disable) <<PAGE_CACHEABLE_SHIFT |139 (!p->present) <<PAGE_PRESENT_SHIFT |140 p->uaccessible <<PAGE_USER_SHIFT |120 (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | 121 (!p->present) << PAGE_PRESENT_SHIFT | 122 p->uaccessible << PAGE_USER_SHIFT | 141 123 1<<PAGE_READ_SHIFT | 142 p->writeable <<PAGE_WRITE_SHIFT |124 p->writeable << PAGE_WRITE_SHIFT | 143 125 1<<PAGE_EXEC_SHIFT | 144 p->global <<PAGE_GLOBAL_SHIFT126 p->global << PAGE_GLOBAL_SHIFT 145 127 ); 146 128 } -
kernel/arch/ia32/include/pm.h
r1ba41c5 rb3f8fb7 82 82 83 83 #include <arch/types.h> 84 #include <typedefs.h>85 84 #include <arch/context.h> 86 85 -
kernel/arch/ia32/include/proc/task.h
r1ba41c5 rb3f8fb7 36 36 #define KERN_ia32_TASK_H_ 37 37 38 #include <typedefs.h>39 38 #include <arch/types.h> 40 39 #include <adt/bitmap.h> -
kernel/arch/ia32/include/smp/apic.h
r1ba41c5 rb3f8fb7 108 108 #define ICRlo (0x300/sizeof(uint32_t)) 109 109 #define ICRhi (0x310/sizeof(uint32_t)) 110 struct icr{110 typedef struct { 111 111 union { 112 112 uint32_t lo; … … 131 131 } __attribute__ ((packed)); 132 132 }; 133 } __attribute__ ((packed)); 134 typedef struct icr icr_t; 133 } __attribute__ ((packed)) icr_t; 135 134 136 135 /* End Of Interrupt. */ … … 139 138 /** Error Status Register. */ 140 139 #define ESR (0x280/sizeof(uint32_t)) 141 union esr{140 typedef union { 142 141 uint32_t value; 143 142 uint8_t err_bitmap; … … 153 152 unsigned : 24; 154 153 } __attribute__ ((packed)); 155 }; 156 typedef union esr esr_t; 154 } esr_t; 157 155 158 156 /* Task Priority Register */ 159 157 #define TPR (0x080/sizeof(uint32_t)) 160 union tpr{158 typedef union { 161 159 uint32_t value; 162 160 struct { … … 164 162 unsigned pri : 4; /**< Task Priority. */ 165 163 } __attribute__ ((packed)); 166 }; 167 typedef union tpr tpr_t; 164 } tpr_t; 168 165 169 166 /** Spurious-Interrupt Vector Register. */ 170 167 #define SVR (0x0f0/sizeof(uint32_t)) 171 union svr{168 typedef union { 172 169 uint32_t value; 173 170 struct { … … 177 174 unsigned : 22; /**< Reserved. */ 178 175 } __attribute__ ((packed)); 179 }; 180 typedef union svr svr_t; 176 } svr_t; 181 177 182 178 /** Time Divide Configuration Register. */ 183 179 #define TDCR (0x3e0/sizeof(uint32_t)) 184 union tdcr{180 typedef union { 185 181 uint32_t value; 186 182 struct { … … 188 184 unsigned : 28; /**< Reserved. */ 189 185 } __attribute__ ((packed)); 190 }; 191 typedef union tdcr tdcr_t; 186 } tdcr_t; 192 187 193 188 /* Initial Count Register for Timer */ … … 199 194 /** LVT Timer register. */ 200 195 #define LVT_Tm (0x320/sizeof(uint32_t)) 201 union lvt_tm{196 typedef union { 202 197 uint32_t value; 203 198 struct { … … 210 205 unsigned : 14; /**< Reserved. */ 211 206 } __attribute__ ((packed)); 212 }; 213 typedef union lvt_tm lvt_tm_t; 207 } lvt_tm_t; 214 208 215 209 /** LVT LINT registers. */ 216 210 #define LVT_LINT0 (0x350/sizeof(uint32_t)) 217 211 #define LVT_LINT1 (0x360/sizeof(uint32_t)) 218 union lvt_lint{212 typedef union { 219 213 uint32_t value; 220 214 struct { … … 229 223 unsigned : 15; /**< Reserved. */ 230 224 } __attribute__ ((packed)); 231 }; 232 typedef union lvt_lint lvt_lint_t; 225 } lvt_lint_t; 233 226 234 227 /** LVT Error register. */ 235 228 #define LVT_Err (0x370/sizeof(uint32_t)) 236 union lvt_error{229 typedef union { 237 230 uint32_t value; 238 231 struct { … … 244 237 unsigned : 15; /**< Reserved. */ 245 238 } __attribute__ ((packed)); 246 }; 247 typedef union lvt_error lvt_error_t; 239 } lvt_error_t; 248 240 249 241 /** Local APIC ID Register. */ 250 242 #define L_APIC_ID (0x020/sizeof(uint32_t)) 251 union l_apic_id{243 typedef union { 252 244 uint32_t value; 253 245 struct { … … 255 247 uint8_t apic_id; /**< Local APIC ID. */ 256 248 } __attribute__ ((packed)); 257 }; 258 typedef union l_apic_id l_apic_id_t; 249 } l_apic_id_t; 259 250 260 251 /** Local APIC Version Register */ … … 267 258 /** Logical Destination Register. */ 268 259 #define LDR (0x0d0/sizeof(uint32_t)) 269 union ldr{260 typedef union { 270 261 uint32_t value; 271 262 struct { … … 273 264 uint8_t id; /**< Logical APIC ID. */ 274 265 } __attribute__ ((packed)); 275 }; 276 typedef union ldr ldr_t; 266 } ldr_t; 277 267 278 268 /** Destination Format Register. */ 279 269 #define DFR (0x0e0/sizeof(uint32_t)) 280 union dfr{270 typedef union { 281 271 uint32_t value; 282 272 struct { … … 284 274 unsigned model : 4; /**< Model. */ 285 275 } __attribute__ ((packed)); 286 }; 287 typedef union dfr dfr_t; 276 } dfr_t; 288 277 289 278 /* IO APIC */ … … 297 286 298 287 /** I/O Register Select Register. */ 299 union io_regsel{288 typedef union { 300 289 uint32_t value; 301 290 struct { … … 303 292 unsigned : 24; /**< Reserved. */ 304 293 } __attribute__ ((packed)); 305 }; 306 typedef union io_regsel io_regsel_t; 294 } io_regsel_t; 307 295 308 296 /** I/O Redirection Register. */ 309 struct io_redirection_reg {297 typedef struct io_redirection_reg { 310 298 union { 311 299 uint32_t lo; … … 330 318 }; 331 319 332 } __attribute__ ((packed)); 333 typedef struct io_redirection_reg io_redirection_reg_t; 320 } __attribute__ ((packed)) io_redirection_reg_t; 334 321 335 322 336 323 /** IO APIC Identification Register. */ 337 union io_apic_id{324 typedef union { 338 325 uint32_t value; 339 326 struct { … … 342 329 unsigned : 4; /**< Reserved. */ 343 330 } __attribute__ ((packed)); 344 }; 345 typedef union io_apic_id io_apic_id_t; 331 } io_apic_id_t; 346 332 347 333 extern volatile uint32_t *l_apic; -
kernel/arch/ia32/include/smp/mps.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <typedefs.h>40 39 #include <synch/waitq.h> 41 40 #include <config.h> -
kernel/arch/ia32/include/smp/smp.h
r1ba41c5 rb3f8fb7 37 37 38 38 #include <arch/types.h> 39 #include <typedefs.h>40 39 41 40 /** SMP config opertaions interface. */ -
kernel/arch/ia32/include/types.h
r1ba41c5 rb3f8fb7 37 37 38 38 #define NULL 0 39 #define false 0 40 #define true 1 39 41 40 42 typedef signed char int8_t; … … 48 50 typedef unsigned long long uint64_t; 49 51 52 typedef uint32_t size_t; 53 typedef uint32_t count_t; 54 typedef uint32_t index_t; 55 50 56 typedef uint32_t uintptr_t; 51 57 typedef uint32_t pfn_t; … … 56 62 typedef int32_t native_t; 57 63 58 typedef struct page_specifier pte_t; 64 typedef uint8_t bool; 65 typedef uint64_t task_id_t; 66 typedef uint32_t context_id_t; 67 68 typedef int32_t inr_t; 69 typedef int32_t devno_t; 70 71 /** Page Table Entry. */ 72 typedef struct { 73 unsigned present : 1; 74 unsigned writeable : 1; 75 unsigned uaccessible : 1; 76 unsigned page_write_through : 1; 77 unsigned page_cache_disable : 1; 78 unsigned accessed : 1; 79 unsigned dirty : 1; 80 unsigned pat : 1; 81 unsigned global : 1; 82 unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */ 83 unsigned avl : 2; 84 unsigned frame_address : 20; 85 } __attribute__ ((packed)) pte_t; 59 86 60 87 #endif
Note:
See TracChangeset
for help on using the changeset viewer.