Changeset b3f8fb7 in mainline for kernel/arch/amd64/src
- Timestamp:
- 2007-01-28T13:25:49Z (18 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8e8c1a5
- Parents:
- 1ba41c5
- Location:
- kernel/arch/amd64/src
- Files:
-
- 5 edited
-
cpu/cpu.c (modified) (3 diffs)
-
ddi/ddi.c (modified) (1 diff)
-
fpu_context.c (modified) (1 diff)
-
mm/memory_init.c (modified) (1 diff)
-
pm.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/amd64/src/cpu/cpu.c
r1ba41c5 rb3f8fb7 33 33 */ 34 34 35 #include <cpu.h> 35 36 #include <arch/cpu.h> 36 37 #include <arch/cpuid.h> … … 40 41 #include <arch/types.h> 41 42 #include <print.h> 42 #include <typedefs.h>43 43 #include <fpu_context.h> 44 44 … … 57 57 58 58 enum vendor { 59 VendorUnknown =0,59 VendorUnknown = 0, 60 60 VendorAMD, 61 61 VendorIntel -
kernel/arch/amd64/src/ddi/ddi.c
r1ba41c5 rb3f8fb7 37 37 #include <proc/task.h> 38 38 #include <arch/types.h> 39 #include <typedefs.h>40 39 #include <adt/bitmap.h> 41 40 #include <mm/slab.h> -
kernel/arch/amd64/src/fpu_context.c
r1ba41c5 rb3f8fb7 35 35 36 36 #include <fpu_context.h> 37 #include <arch.h>38 #include <cpu.h>39 37 40 38 /** Save FPU (mmx, sse) context using fxsave instruction */ -
kernel/arch/amd64/src/mm/memory_init.c
r1ba41c5 rb3f8fb7 39 39 40 40 uint8_t e820counter = 0xff; 41 struct e820memmap_e820table[MEMMAP_E820_MAX_RECORDS];41 e820memmap_t e820table[MEMMAP_E820_MAX_RECORDS]; 42 42 uint32_t e801memorysize; 43 43 -
kernel/arch/amd64/src/pm.c
r1ba41c5 rb3f8fb7 35 35 36 36 #include <arch/pm.h> 37 #include <arch/mm/page.h>38 #include <arch/types.h>39 #include <arch/interrupt.h>40 37 #include <arch/asm.h> 41 #include <interrupt.h>42 38 #include <mm/as.h> 43 44 #include <config.h> 45 39 #include <mm/frame.h> 46 40 #include <memstr.h> 47 41 #include <mm/slab.h> 48 #include <debug.h>49 42 50 43 /*
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