Changeset b2fa2d86 in mainline for kernel/arch

Timestamp:

2013-03-26T15:06:35Z (13 years ago)

Author:

Vojtech Horky <vojtechhorky@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

ea15a89a

Parents:

8a26f82 (diff), 5c4356b (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes

Location:

kernel/arch

Files:

• amd64/src/mm/page.c (modified) (2 diffs)
• arm32/src/fpu_context.c (modified) (1 diff)
• ia32/src/mm/page.c (modified) (2 diffs)
• mips32/src/mm/tlb.c (modified) (8 diffs)
• sparc64/src/mm/sun4u/tlb.c (modified) (2 diffs)

kernel/arch/amd64/src/mm/page.c

@@ -78 +78 @@
 void page_fault(unsigned int n, istate_t *istate)
 {
-        uintptr_t page = read_cr2();
+        uintptr_t badvaddr = read_cr2();
         
         if (istate->error_word & PFERR_CODE_RSVD)
@@ -92 +92 @@
                 access = PF_ACCESS_READ;
         
-        as_page_fault(page, access, istate);
+        (void) as_page_fault(badvaddr, access, istate);
 }
 

kernel/arch/arm32/src/fpu_context.c

@@ -119 +119 @@
  * rely on user decision to use CONFIG_FPU.
  */
-#ifdef PROCESSOR_ARC_armv7_a
+#ifdef PROCESSOR_ARCH_armv7_a
         const uint32_t cpacr = CPACR_read();
         /* FPU needs access to coprocessor 10 and 11.
-         * Moreover they need to have same access enabledd */
+         * Moreover they need to have same access enabled */
         if (((cpacr & CPACR_CP_MASK(10)) != CPACR_CP_FULL_ACCESS(10)) &&
            ((cpacr & CPACR_CP_MASK(11)) != CPACR_CP_FULL_ACCESS(11))) {

kernel/arch/ia32/src/mm/page.c

@@ -84 +84 @@
 void page_fault(unsigned int n __attribute__((unused)), istate_t *istate)
 {
-        uintptr_t page;
+        uintptr_t badvaddr;
         pf_access_t access;
         
-        page = read_cr2();
+        badvaddr = read_cr2();
                 
         if (istate->error_word & PFERR_CODE_RSVD)
@@ -97 +97 @@
                 access = PF_ACCESS_READ;
         
-        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
-                fault_if_from_uspace(istate, "Page fault: %#x.", page);
-                panic_memtrap(istate, access, page, NULL);
-        }
+        (void) as_page_fault(badvaddr, access, istate);
 }
 

kernel/arch/mips32/src/mm/tlb.c

@@ -94 +94 @@
         entry_lo_t lo;
         uintptr_t badvaddr;
-        uintptr_t page;
         pte_t *pte;
         
         badvaddr = cp0_badvaddr_read();
-        page = ALIGN_DOWN(badvaddr, PAGE_SIZE);
-
-        pte = page_mapping_find(AS, page, true);
+
+        pte = page_mapping_find(AS, badvaddr, true);
         if (pte && pte->p) {
                 /*
@@ -125 +123 @@
         }
 
-        (void) as_page_fault(page, PF_ACCESS_READ, istate);
+        (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
 }
 
@@ -137 +135 @@
         tlb_index_t index;
         uintptr_t badvaddr;
-        uintptr_t page;
         pte_t *pte;
 
@@ -161 +158 @@
 
         badvaddr = cp0_badvaddr_read();
-        page = ALIGN_DOWN(badvaddr, PAGE_SIZE);
-
-        pte = page_mapping_find(AS, page, true);
+
+        pte = page_mapping_find(AS, badvaddr, true);
         if (pte && pte->p) {
                 /*
@@ -189 +185 @@
         }
 
-        (void) as_page_fault(page, PF_ACCESS_READ, istate);
+        (void) as_page_fault(badvaddr, PF_ACCESS_READ, istate);
 }
 
@@ -201 +197 @@
         tlb_index_t index;
         uintptr_t badvaddr;
-        uintptr_t page;
         pte_t *pte;
 
         badvaddr = cp0_badvaddr_read();
-        page = ALIGN_DOWN(badvaddr, PAGE_SIZE);
 
         /*
@@ -227 +221 @@
         }
 
-        pte = page_mapping_find(AS, page, true);
+        pte = page_mapping_find(AS, badvaddr, true);
         if (pte && pte->p && pte->w) {
                 /*
@@ -254 +248 @@
         }
 
-        (void) as_page_fault(page, PF_ACCESS_WRITE, istate);
+        (void) as_page_fault(badvaddr, PF_ACCESS_WRITE, istate);
 }
 

kernel/arch/sparc64/src/mm/sun4u/tlb.c

@@ -196 +196 @@
 void fast_instruction_access_mmu_miss(sysarg_t unused, istate_t *istate)
 {
-        uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
         size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
         pte_t *t;
 
-        t = page_mapping_find(AS, page_16k, true);
+        t = page_mapping_find(AS, istate->tpc, true);
         if (t && PTE_EXECUTABLE(t)) {
                 /*
@@ -216 +215 @@
                  * handler.
                  */
-                as_page_fault(page_16k, PF_ACCESS_EXEC, istate);
+                as_page_fault(istate->tpc, PF_ACCESS_EXEC, istate);
         }
 }