Changeset b1c57a8 in mainline for kernel/arch/ia32/src
- Timestamp:
- 2014-10-09T15:03:55Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e367939c
- Parents:
- 21799398 (diff), 207e8880 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Location:
- kernel/arch/ia32/src
- Files:
-
- 1 added
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/src/cpu/cpu.c
r21799398 rb1c57a8 160 160 void cpu_print_report(cpu_t* cpu) 161 161 { 162 printf("cpu%u: (%s family=%u model=%u stepping=%u ) %" PRIu16 " MHz\n",163 cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family,164 cpu->arch.model, cpu->arch.stepping, cpu-> frequency_mhz);162 printf("cpu%u: (%s family=%u model=%u stepping=%u apicid=%u) %" PRIu16 163 " MHz\n", cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family, 164 cpu->arch.model, cpu->arch.stepping, cpu->arch.id, cpu->frequency_mhz); 165 165 } 166 166 -
kernel/arch/ia32/src/ia32.c
r21799398 rb1c57a8 122 122 } 123 123 124 void arch_post_cpu_init( )124 void arch_post_cpu_init(void) 125 125 { 126 126 #ifdef CONFIG_SMP -
kernel/arch/ia32/src/interrupt.c
r21799398 rb1c57a8 54 54 #include <symtab.h> 55 55 #include <stacktrace.h> 56 #include <smp/smp_call.h> 57 #include <proc/task.h> 56 58 57 59 /* … … 170 172 tlb_shootdown_ipi_recv(); 171 173 } 174 175 static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate) 176 { 177 trap_virtual_eoi(); 178 smp_call_ipi_recv(); 179 } 172 180 #endif 173 181 … … 230 238 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true, 231 239 (iroutine_t) tlb_shootdown_ipi); 240 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true, 241 (iroutine_t) arch_smp_call_ipi_recv); 232 242 #endif 233 243 } -
kernel/arch/ia32/src/smp/apic.c
r21799398 rb1c57a8 264 264 } 265 265 266 #define DELIVS_PENDING_SILENT_RETRIES 4 267 266 /* Waits for the destination cpu to accept the previous ipi. */ 268 267 static void l_apic_wait_for_delivery(void) 269 268 { 270 269 icr_t icr; 271 unsigned retries = 0; 272 270 273 271 do { 274 if (retries++ > DELIVS_PENDING_SILENT_RETRIES) {275 retries = 0;276 #ifdef CONFIG_DEBUG277 log(LF_ARCH, LVL_DEBUG, "IPI is pending.");278 #endif279 delay(20);280 }281 272 icr.lo = l_apic[ICRlo]; 282 } while (icr.delivs == DELIVS_PENDING); 283 273 } while (icr.delivs != DELIVS_IDLE); 274 } 275 276 /** Send one CPU an IPI vector. 277 * 278 * @param apicid Physical APIC ID of the destination CPU. 279 * @param vector Interrupt vector to be sent. 280 * 281 * @return 0 on failure, 1 on success. 282 */ 283 int l_apic_send_custom_ipi(uint8_t apicid, uint8_t vector) 284 { 285 icr_t icr; 286 287 /* Wait for a destination cpu to accept our previous ipi. */ 288 l_apic_wait_for_delivery(); 289 290 icr.lo = l_apic[ICRlo]; 291 icr.hi = l_apic[ICRhi]; 292 293 icr.delmod = DELMOD_FIXED; 294 icr.destmod = DESTMOD_PHYS; 295 icr.level = LEVEL_ASSERT; 296 icr.shorthand = SHORTHAND_NONE; 297 icr.trigger_mode = TRIGMOD_LEVEL; 298 icr.vector = vector; 299 icr.dest = apicid; 300 301 /* Send the IPI by writing to l_apic[ICRlo]. */ 302 l_apic[ICRhi] = icr.hi; 303 l_apic[ICRlo] = icr.lo; 304 305 return apic_poll_errors(); 284 306 } 285 307 … … 294 316 { 295 317 icr_t icr; 318 319 /* Wait for a destination cpu to accept our previous ipi. */ 320 l_apic_wait_for_delivery(); 296 321 297 322 icr.lo = l_apic[ICRlo]; … … 304 329 305 330 l_apic[ICRlo] = icr.lo; 306 307 l_apic_wait_for_delivery();308 331 309 332 return apic_poll_errors(); -
kernel/arch/ia32/src/smp/smp.c
r21799398 rb1c57a8 55 55 #include <memstr.h> 56 56 #include <arch/drivers/i8259.h> 57 #include <cpu.h> 57 58 58 59 #ifdef CONFIG_SMP … … 77 78 io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE, 78 79 PAGE_WRITE | PAGE_NOT_CACHEABLE); 80 } 81 } 82 83 static void cpu_arch_id_init(void) 84 { 85 ASSERT(ops != NULL); 86 ASSERT(cpus != NULL); 87 88 for (unsigned int i = 0; i < config.cpu_count; ++i) { 89 cpus[i].arch.id = ops->cpu_apic_id(i); 79 90 } 80 91 } … … 92 103 93 104 ASSERT(ops != NULL); 105 106 /* 107 * SMP initialized, cpus array allocated. Assign each CPU its 108 * physical APIC ID. 109 */ 110 cpu_arch_id_init(); 94 111 95 112 /*
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