Changeset aecf79f in mainline for kernel/arch/xen32/src

Timestamp:

2006-07-24T16:07:15Z (19 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c59dd1a2

Parents:

7b0599b

Message:

xen memory initialization

Location:

kernel/arch/xen32/src

Files:

• boot/boot.S (modified) (2 diffs)
• drivers/xconsole.c (added)
• interrupt.c (modified) (1 diff, 1 prop)
• mm/frame.c (modified) (1 diff)
• mm/page.c (modified) (1 diff)
• pm.c (modified) (6 diffs)
• smp/smp.c (modified) (2 diffs)
• xen32.c (modified) (7 diffs)

kernel/arch/xen32/src/boot/boot.S

@@ -35 +35 @@
         .ascii  "GUEST_OS=HelenOS,"
         .ascii  "XEN_VER=xen-3.0,"
-        .ascii  "HYPERCALL_PAGE=0x0002,"
+        .ascii  "HYPERCALL_PAGE=0x0000,"
         .ascii  "LOADER=generic,"
         .ascii  "PT_MODE_WRITABLE"
@@ -61 +61 @@
         hlt
 
+.section K_TEXT_START, "aw", @progbits
 .global hypercall_page
-
-.org (0x0002 * PAGE_SIZE)
+.org 0
 hypercall_page:
         .space PAGE_SIZE

kernel/arch/xen32/src/interrupt.c

@@ -1 @@
-../../ia32/src/interrupt.c
+/*
+ * Copyright (C) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup xen32interrupt
+ * @{
+ */
+/** @file
+ */
+
+#include <arch/interrupt.h>
+#include <syscall/syscall.h>
+#include <print.h>
+#include <debug.h>
+#include <panic.h>
+#include <func.h>
+#include <cpu.h>
+#include <arch/asm.h>
+#include <mm/tlb.h>
+#include <mm/as.h>
+#include <arch.h>
+#include <symtab.h>
+#include <proc/thread.h>
+#include <proc/task.h>
+#include <synch/spinlock.h>
+#include <arch/ddi/ddi.h>
+#include <ipc/sysipc.h>
+#include <interrupt.h>
+
+/*
+ * Interrupt and exception dispatching.
+ */
+
+void (* disable_irqs_function)(uint16_t irqmask) = NULL;
+void (* enable_irqs_function)(uint16_t irqmask) = NULL;
+void (* eoi_function)(void) = NULL;
+
+void PRINT_INFO_ERRCODE(istate_t *istate)
+{
+        char *symbol = get_symtab_entry(istate->eip);
+
+        if (!symbol)
+                symbol = "";
+
+        if (CPU)
+                printf("----------------EXCEPTION OCCURED (cpu%d)----------------\n", CPU->id);
+        else
+                printf("----------------EXCEPTION OCCURED----------------\n");
+                
+        printf("%%eip: %#x (%s)\n",istate->eip,symbol);
+        printf("ERROR_WORD=%#x\n", istate->error_word);
+        printf("%%cs=%#x,flags=%#x\n", istate->cs, istate->eflags);
+        printf("%%eax=%#x, %%ecx=%#x, %%edx=%#x, %%esp=%#x\n",  istate->eax,istate->ecx,istate->edx,&istate->stack[0]);
+#ifdef CONFIG_DEBUG_ALLREGS
+        printf("%%esi=%#x, %%edi=%#x, %%ebp=%#x, %%ebx=%#x\n",  istate->esi,istate->edi,istate->ebp,istate->ebx);
+#endif
+        printf("stack: %#x, %#x, %#x, %#x\n", istate->stack[0], istate->stack[1], istate->stack[2], istate->stack[3]);
+        printf("       %#x, %#x, %#x, %#x\n", istate->stack[4], istate->stack[5], istate->stack[6], istate->stack[7]);
+}
+
+void null_interrupt(int n, istate_t *istate)
+{
+        fault_if_from_uspace(istate, "unserviced interrupt: %d", n);
+
+        PRINT_INFO_ERRCODE(istate);
+        panic("unserviced interrupt: %d\n", n);
+}
+
+/** General Protection Fault. */
+void gp_fault(int n, istate_t *istate)
+{
+        if (TASK) {
+                count_t ver;
+                
+                spinlock_lock(&TASK->lock);
+                ver = TASK->arch.iomapver;
+                spinlock_unlock(&TASK->lock);
+        
+                if (CPU->arch.iomapver_copy != ver) {
+                        /*
+                         * This fault can be caused by an early access
+                         * to I/O port because of an out-dated
+                         * I/O Permission bitmap installed on CPU.
+                         * Install the fresh copy and restart
+                         * the instruction.
+                         */
+                        io_perm_bitmap_install();
+                        return;
+                }
+                fault_if_from_uspace(istate, "general protection fault");
+        }
+
+        PRINT_INFO_ERRCODE(istate);
+        panic("general protection fault\n");
+}
+
+void ss_fault(int n, istate_t *istate)
+{
+        fault_if_from_uspace(istate, "stack fault");
+
+        PRINT_INFO_ERRCODE(istate);
+        panic("stack fault\n");
+}
+
+void simd_fp_exception(int n, istate_t *istate)
+{
+        uint32_t mxcsr;
+        asm
+        (
+                "stmxcsr %0;\n"
+                :"=m"(mxcsr)
+        );
+        fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR: %#zx",
+                             (unative_t)mxcsr);
+
+        PRINT_INFO_ERRCODE(istate);
+        printf("MXCSR: %#zx\n",(unative_t)(mxcsr));
+        panic("SIMD FP exception(19)\n");
+}
+
+void nm_fault(int n, istate_t *istate)
+{
+#ifdef CONFIG_FPU_LAZY     
+        scheduler_fpu_lazy_request();
+#else
+        fault_if_from_uspace(istate, "fpu fault");
+        panic("fpu fault");
+#endif
+}
+
+void syscall(int n, istate_t *istate)
+{
+        panic("Obsolete syscall handler.");
+}
+
+void tlb_shootdown_ipi(int n, istate_t *istate)
+{
+        trap_virtual_eoi();
+        tlb_shootdown_ipi_recv();
+}
+
+void trap_virtual_enable_irqs(uint16_t irqmask)
+{
+        if (enable_irqs_function)
+                enable_irqs_function(irqmask);
+        else
+                panic("no enable_irqs_function\n");
+}
+
+void trap_virtual_disable_irqs(uint16_t irqmask)
+{
+        if (disable_irqs_function)
+                disable_irqs_function(irqmask);
+        else
+                panic("no disable_irqs_function\n");
+}
+
+void trap_virtual_eoi(void)
+{
+        if (eoi_function)
+                eoi_function();
+        else
+                panic("no eoi_function\n");
+
+}
+
+static void ipc_int(int n, istate_t *istate)
+{
+        ipc_irq_send_notif(n-IVT_IRQBASE);
+        trap_virtual_eoi();
+}
+
+
+/* Reregister irq to be IPC-ready */
+void irq_ipc_bind_arch(unative_t irq)
+{
+        if (irq == IRQ_CLK)
+                return;
+        exc_register(IVT_IRQBASE+irq, "ipc_int", ipc_int);
+        trap_virtual_enable_irqs(1 << irq);
+}
+
+/** @}
+ */
+

kernel/arch/xen32/src/mm/frame.c

@@ -52 +52 @@
 void frame_arch_init(void)
 {
-        static pfn_t minconf;
-
         if (config.cpu_active == 1) {
-                minconf = 1;
-#ifdef CONFIG_SIMICS_FIX
-                minconf = max(minconf, ADDR2PFN(0x10000));
-#endif
-
-                /* Reserve frame 0 (BIOS data) */
-                frame_mark_unavailable(0, 1);
+                pfn_t start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.pt_base), PAGE_SIZE)) + start_info.nr_pt_frames;
+                size_t size = start_info.nr_pages - start;
                 
-#ifdef CONFIG_SIMICS_FIX
-                /* Don't know why, but these addresses help */
-                frame_mark_unavailable(0xd000 >> FRAME_WIDTH,3);
-#endif
+                zone_create(start, size, start, 0);
+                last_frame = start + size;
         }
 }

kernel/arch/xen32/src/mm/page.c

@@ -78 +78 @@
 }
 
-
-uintptr_t hw_map(uintptr_t physaddr, size_t size)
-{
-        if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-                panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
-        
-        uintptr_t virtaddr = PA2KA(last_frame);
-        pfn_t i;
-        for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
-                page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE);
-        
-        last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
-        
-        return virtaddr;
-}
-
 void page_fault(int n, istate_t *istate)
 {
-        uintptr_t page;
+        uintptr_t page;
         pf_access_t access;
         
-        page = read_cr2();
-                
-        if (istate->error_word & PFERR_CODE_RSVD)
+        page = read_cr2();
+        
+        if (istate->error_word & PFERR_CODE_RSVD)
                 panic("Reserved bit set in page directory.\n");
-
+        
         if (istate->error_word & PFERR_CODE_RW)
                 access = PF_ACCESS_WRITE;
         else
                 access = PF_ACCESS_READ;
-
-        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
+        
+        if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
                 fault_if_from_uspace(istate, "Page fault: %#x", page);
-
-                PRINT_INFO_ERRCODE(istate);
-                printf("page fault address: %#x\n", page);
-                panic("page fault\n");
-        }
+                
+                PRINT_INFO_ERRCODE(istate);
+                printf("page fault address: %#x\n", page);
+                panic("page fault\n");
+        }
 }
 

kernel/arch/xen32/src/pm.c

@@ -74 +74 @@
         /* TLS descriptor */
         { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 },
-        /* VESA Init descriptor */
-#ifdef CONFIG_FB
-        { 0xffff, 0, VESA_INIT_SEGMENT>>12, AR_PRESENT | AR_CODE | DPL_KERNEL, 0xf, 0, 0, 0, 0, 0 }
-#endif  
 };
 
@@ -153 +149 @@
 static void clean_IOPL_NT_flags(void)
 {
-        __asm__ volatile (
-                "pushfl\n"
-                "pop %%eax\n"
-                "and $0xffff8fff, %%eax\n"
-                "push %%eax\n"
-                "popfl\n"
-                : : : "eax"
-        );
+//      __asm__ volatile (
+//              "pushfl\n"
+//              "pop %%eax\n"
+//              "and $0xffff8fff, %%eax\n"
+//              "push %%eax\n"
+//              "popfl\n"
+//              : : : "eax"
+//      );
 }
 
@@ -166 +162 @@
 static void clean_AM_flag(void)
 {
-        __asm__ volatile (
-                "mov %%cr0, %%eax\n"
-                "and $0xfffbffff, %%eax\n"
-                "mov %%eax, %%cr0\n"
-                : : : "eax"
-        );
+//      __asm__ volatile (
+//              "mov %%cr0, %%eax\n"
+//              "and $0xfffbffff, %%eax\n"
+//              "mov %%eax, %%cr0\n"
+//              : : : "eax"
+//      );
 }
 
@@ -184 +180 @@
         idtr.limit = sizeof(idt);
         idtr.base = (uintptr_t) idt;
-        gdtr_load(&gdtr);
-        idtr_load(&idtr);
+//      gdtr_load(&gdtr);
+//      idtr_load(&idtr);
         
         /*
@@ -192 +188 @@
          */
 
-        if (config.cpu_active == 1) {
-                idt_init();
-                /*
-                 * NOTE: bootstrap CPU has statically allocated TSS, because
-                 * the heap hasn't been initialized so far.
-                 */
+//      if (config.cpu_active == 1) {
+//              idt_init();
+//              /*
+//               * NOTE: bootstrap CPU has statically allocated TSS, because
+//               * the heap hasn't been initialized so far.
+//               */
                 tss_p = &tss;
-        }
-        else {
-                tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
-                if (!tss_p)
-                        panic("could not allocate TSS\n");
-        }
-
-        tss_initialize(tss_p);
+//      }
+//      else {
+//              tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
+//              if (!tss_p)
+//                      panic("could not allocate TSS\n");
+//      }
+
+//      tss_initialize(tss_p);
         
         gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL;
@@ -219 +215 @@
          * to its own TSS. We just need to load the TR register.
          */
-        tr_load(selector(TSS_DES));
+//      tr_load(selector(TSS_DES));
         
         clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels and clear NT flag. */

kernel/arch/xen32/src/smp/smp.c

@@ -54 +54 @@
 #include <print.h>
 #include <memstr.h>
-#include <arch/drivers/i8259.h>
 
 #ifdef CONFIG_SMP
@@ -119 +118 @@
         outb(0x71,0xa);
 
-        pic_disable_irqs(0xffff);
+//      pic_disable_irqs(0xffff);
         apic_init();
 

kernel/arch/xen32/src/xen32.c

@@ -40 +40 @@
 #include <arch/pm.h>
 
-#include <arch/drivers/ega.h>
-#include <arch/drivers/vesa.h>
-#include <genarch/i8042/i8042.h>
-#include <arch/drivers/i8254.h>
-#include <arch/drivers/i8259.h>
+#include <arch/drivers/xconsole.h>
 
 #include <arch/context.h>
@@ -68 +64 @@
 void arch_pre_mm_init(void)
 {
-//      pm_init();
+        pm_init();
 
         if (config.cpu_active == 1) {
 //              bios_init();
-//              i8259_init();   /* PIC */
-//              i8254_init();   /* hard clock */
                 
 //              exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
@@ -87 +81 @@
 {
         if (config.cpu_active == 1) {
-
-#ifdef CONFIG_FB
-                if (vesa_present()) 
-                        vesa_init();
-                else
-#endif
-                        ega_init();     /* video */
-                
-                
+                /* video */
+                xen_console_init();
                 /* Enable debugger */
                 debugger_init();
@@ -116 +103 @@
 void arch_post_smp_init(void)
 {
-        i8042_init();   /* keyboard controller */
 }
 
 void calibrate_delay_loop(void)
 {
-        i8254_calibrate_delay_loop();
+//      i8254_calibrate_delay_loop();
         if (config.cpu_active == 1) {
                 /*
@@ -127 +113 @@
                  * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
                  */
-                i8254_normal_operation();
+//              i8254_normal_operation();
         }
 }
@@ -149 +135 @@
 void arch_grab_console(void)
 {
-        i8042_grab();
 }
+
 /** Return console to userspace
  *
@@ -156 +142 @@
 void arch_release_console(void)
 {
-        i8042_release();
 }