Changeset ae8d7b0 in mainline for boot/arch/riscv64/include

Timestamp:

2017-08-21T18:23:39Z (8 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c58441d

Parents:

fdc29300

Message:

riscv64: update to the latest Privileged Architecture specification (1.10)

Location:

boot/arch/riscv64/include

Files:

• arch.h (modified) (1 diff)
• asm.h (modified) (1 diff)
• mm.h (added)
• types.h (modified) (2 diffs)
• ucb.h (modified) (1 diff)

boot/arch/riscv64/include/arch.h

@@ -35 +35 @@
 #define BOOT_STACK_SIZE  PAGE_SIZE
 
+#define PHYSMEM_START  0x40000000
+#define PHYSMEM_SIZE   1073741824
+#define BOOT_OFFSET    0x48000000
+
 #define DEFAULT_MTVEC      0x00000100
 #define TRAP_VECTOR_RESET  0x0100

boot/arch/riscv64/include/asm.h

@@ -32 +32 @@
 #include <stddef.h>
 
-extern void jump_to_kernel(void *, uintptr_t)
+extern char htif_page[];
+extern char pt_page[];
+
+extern void jump_to_kernel(uintptr_t)
     __attribute__((noreturn));
 

boot/arch/riscv64/include/types.h

@@ -42 +42 @@
 
 typedef struct {
+        volatile uint64_t *tohost;
+        volatile uint64_t *fromhost;
+} ucbinfo_t;
+
+typedef struct {
         void *start;
         size_t size;
@@ -67 +72 @@
 
 typedef struct {
+        ucbinfo_t ucbinfo;
+        uintptr_t physmem_start;
+        uintptr_t htif_frame;
+        uintptr_t pt_frame;
         memmap_t memmap;
         taskmap_t taskmap;

boot/arch/riscv64/include/ucb.h

@@ -38 +38 @@
 #include <stddef.h>
 
-#define CSR_MTOHOST    0x780
-#define CSR_MFROMHOST  0x781
+extern volatile uint64_t tohost;
+extern volatile uint64_t fromhost;
 
 #define HTIF_DEVICE_CONSOLE  1