Changeset ae5fb7c8 in mainline for kernel

Timestamp:

2013-08-07T21:02:08Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

15187c3

Parents:

0c40fd5

Message:

arm32: Set proper memory type in boot pt.

Add explanatory comments.

Location:

kernel/arch/arm32/include/arch/mm

Files:

• page.h (modified) (1 diff)
• page_armv6.h (modified) (1 diff)

kernel/arch/arm32/include/arch/mm/page.h

@@ -146 +146 @@
  *
  * Page tables are always in cacheable memory.
- * Make sure the memory type is correct.
+ * Make sure the memory type is correct, and in sync with:
+ * init_boot_pt (boot/arch/arm32/src/mm.c)
+ * init_ptl0_section (boot/arch/arm32/src/mm.c)
+ * set_pt_level1_flags (kernel/arch/arm32/include/arch/mm/page_armv6.h)
  */
 NO_TRACE static inline void set_ptl0_addr(pte_t *pt)

kernel/arch/arm32/include/arch/mm/page_armv6.h

@@ -260 +260 @@
                  * Write-through, no write-allocate memory, see ch. B3.8.2
                  * (p. B3-1358) of ARM Architecture reference manual.
+                 * Make sure the memory type is correct, and in sync with:
+                 * init_boot_pt (boot/arch/arm32/src/mm.c)
+                 * init_ptl0_section (boot/arch/arm32/src/mm.c)
+                 * set_ptl0_addr (kernel/arch/arm32/include/arch/mm/page.h)
                  */
                 //TODO: Use writeback, write-allocate caches