- Timestamp:
- 2013-08-07T21:02:08Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 15187c3
- Parents:
- 0c40fd5
- Location:
- kernel/arch/arm32/include/arch/mm
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/include/arch/mm/page.h
r0c40fd5 rae5fb7c8 146 146 * 147 147 * Page tables are always in cacheable memory. 148 * Make sure the memory type is correct. 148 * Make sure the memory type is correct, and in sync with: 149 * init_boot_pt (boot/arch/arm32/src/mm.c) 150 * init_ptl0_section (boot/arch/arm32/src/mm.c) 151 * set_pt_level1_flags (kernel/arch/arm32/include/arch/mm/page_armv6.h) 149 152 */ 150 153 NO_TRACE static inline void set_ptl0_addr(pte_t *pt) -
kernel/arch/arm32/include/arch/mm/page_armv6.h
r0c40fd5 rae5fb7c8 260 260 * Write-through, no write-allocate memory, see ch. B3.8.2 261 261 * (p. B3-1358) of ARM Architecture reference manual. 262 * Make sure the memory type is correct, and in sync with: 263 * init_boot_pt (boot/arch/arm32/src/mm.c) 264 * init_ptl0_section (boot/arch/arm32/src/mm.c) 265 * set_ptl0_addr (kernel/arch/arm32/include/arch/mm/page.h) 262 266 */ 263 267 //TODO: Use writeback, write-allocate caches
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