Changes in kernel/arch/ia32/src/cpu/cpu.c [4a537dd:add04f7] in mainline

File:

• kernel/arch/ia32/src/cpu/cpu.c (modified) (5 diffs)

kernel/arch/ia32/src/cpu/cpu.c

@@ -92 +92 @@
 void cpu_arch_init(void)
 {
+        cpuid_feature_info fi;
         cpuid_extended_feature_info efi;
         cpu_info_t info;
@@ -101 +102 @@
         CPU->fpu_owner = NULL;
         
-        cpuid(INTEL_CPUID_STANDARD, &info);
+        cpuid(1, &info);
         
-        CPU->arch.fi.word = info.cpuid_edx;
+        fi.word = info.cpuid_edx;
         efi.word = info.cpuid_ecx;
         
-        if (CPU->arch.fi.bits.fxsr)
+        if (fi.bits.fxsr)
                 fpu_fxsr();
         else
                 fpu_fsr();
         
-        if (CPU->arch.fi.bits.sse) {
+        if (fi.bits.sse) {
                 asm volatile (
                         "mov %%cr4, %[help]\n"
@@ -121 +122 @@
         }
         
-        if (CPU->arch.fi.bits.sep) {
-                /* Setup fast SYSENTER/SYSEXIT syscalls */
-                syscall_setup_cpu();
-        }
+        /* Setup fast SYSENTER/SYSEXIT syscalls */
+        syscall_setup_cpu();
 }
 
@@ -133 +132 @@
         CPU->arch.vendor = VendorUnknown;
         if (has_cpuid()) {
-                cpuid(INTEL_CPUID_LEVEL, &info);
+                cpuid(0, &info);
 
                 /*
@@ -151 +150 @@
                         CPU->arch.vendor = VendorIntel;
                 
-                cpuid(INTEL_CPUID_STANDARD, &info);
+                cpuid(1, &info);
                 CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
                 CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;