Changeset a9ac978 in mainline for kernel/arch/sparc64/include
- Timestamp:
- 2006-09-27T20:11:34Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 00b38a3
- Parents:
- 86b31ba9
- Location:
- kernel/arch/sparc64/include
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/atomic.h
r86b31ba9 ra9ac978 97 97 { 98 98 uint64_t v = 1; 99 volatile uintptr_t x = (uint64_t) &val->count; 99 100 100 __asm__ volatile ("casx %0, %2, %1\n" : "+m" (* val), "+r" (v) : "r" (0));101 __asm__ volatile ("casx %0, %2, %1\n" : "+m" (*((uint64_t *) x)), "+r" (v) : "r" (0)); 101 102 102 103 return v; … … 107 108 uint64_t tmp1 = 1; 108 109 uint64_t tmp2; 110 111 volatile uintptr_t x = (uint64_t) &val->count; 109 112 110 113 __asm__ volatile ( … … 120 123 "nop\n" 121 124 "2:\n" 122 : "+m" (* val), "+r" (tmp1), "+r" (tmp2) : "r" (0)125 : "+m" (*((uint64_t *) x)), "+r" (tmp1), "+r" (tmp2) : "r" (0) 123 126 ); 124 127 -
kernel/arch/sparc64/include/cpu.h
r86b31ba9 ra9ac978 36 36 #define KERN_sparc64_CPU_H_ 37 37 38 #include <arch/types.h> 38 39 #include <arch/register.h> 39 40 … … 52 53 53 54 struct cpu_arch { 55 uint32_t mid; /**< Processor ID as read from UPA_CONFIG. */ 54 56 ver_reg_t ver; 55 uint32_t clock_frequency; 57 uint32_t clock_frequency; /**< Processor frequency in MHz. */ 56 58 }; 57 59 -
kernel/arch/sparc64/include/interrupt.h
r86b31ba9 ra9ac978 41 41 #include <arch/regdef.h> 42 42 43 #define IRQ_COUNT 1 /* TODO */43 #define IRQ_COUNT 1 /* TODO */ 44 44 45 45 #define IVT_ITEMS 15 46 46 #define IVT_FIRST 1 47 48 #define VECTOR_TLB_SHOOTDOWN_IPI 0 /* TODO */ 47 49 48 50 struct istate { -
kernel/arch/sparc64/include/regdef.h
r86b31ba9 ra9ac978 56 56 #define WSTATE_OTHER(n) ((n)<<3) 57 57 58 #define UPA_CONFIG_MID_SHIFT 17 59 #define UPA_CONFIG_MID_MASK 0x1f 60 58 61 #endif 59 62
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