Changeset a6d4ceb in mainline for arch/ia32/src/proc
- Timestamp:
- 2006-04-13T14:27:30Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 963074b3
- Parents:
- 1ace9ea
- Location:
- arch/ia32/src/proc
- Files:
-
- 2 edited
-
scheduler.c (modified) (1 diff)
-
thread.c (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/src/proc/scheduler.c
r1ace9ea ra6d4ceb 41 41 42 42 /* Set up TLS in GS register */ 43 set_tls_desc(THREAD-> tls);43 set_tls_desc(THREAD->arch.tls); 44 44 45 45 #ifdef CONFIG_DEBUG_AS_WATCHPOINT -
arch/ia32/src/proc/thread.c
r1ace9ea ra6d4ceb 35 35 void thread_create_arch(thread_t *t) 36 36 { 37 t-> tls = 0;37 t->arch.tls = 0; 38 38 }
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