Changeset a35b458 in mainline for kernel/arch/ia64/include
- Timestamp:
- 2018-03-02T20:10:49Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f1380b7
- Parents:
- 3061bc1
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)
- Location:
- kernel/arch/ia64/include/arch
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia64/include/arch/asm.h
r3061bc1 ra35b458 51 51 return legacyio_virt_base + (((prt >> 2) << 12) | (prt & 0xfff)); 52 52 } 53 53 54 54 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) 55 55 { … … 58 58 else 59 59 *port = v; 60 60 61 61 asm volatile ( 62 62 "mf\n" … … 72 72 else 73 73 *port = v; 74 74 75 75 asm volatile ( 76 76 "mf\n" … … 86 86 else 87 87 *port = v; 88 88 89 89 asm volatile ( 90 90 "mf\n" … … 112 112 ::: "memory" 113 113 ); 114 114 115 115 return v; 116 116 } … … 134 134 ::: "memory" 135 135 ); 136 136 137 137 return v; 138 138 } … … 141 141 { 142 142 uint32_t v; 143 144 asm volatile ( 145 "mf\n" 146 ::: "memory" 147 ); 148 143 144 asm volatile ( 145 "mf\n" 146 ::: "memory" 147 ); 148 149 149 if (port < (ioport32_t *) IO_SPACE_BOUNDARY) 150 150 v = *((ioport32_t *) p2a(port)); … … 169 169 { 170 170 uint64_t value; 171 171 172 172 asm volatile ( 173 173 "mov %[value] = r12" 174 174 : [value] "=r" (value) 175 175 ); 176 176 177 177 return (value & (~(STACK_SIZE / 2 - 1))); 178 178 } … … 186 186 { 187 187 uint64_t v; 188 188 189 189 asm volatile ( 190 190 "mov %[value] = psr\n" 191 191 : [value] "=r" (v) 192 192 ); 193 193 194 194 return v; 195 195 } … … 203 203 { 204 204 uint64_t v; 205 205 206 206 asm volatile ( 207 207 "mov %[value] = cr.iva\n" 208 208 : [value] "=r" (v) 209 209 ); 210 210 211 211 return v; 212 212 } … … 234 234 { 235 235 uint64_t v; 236 236 237 237 asm volatile ( 238 238 "mov %[value] = cr.ivr\n" 239 239 : [value] "=r" (v) 240 240 ); 241 241 242 242 return v; 243 243 } … … 246 246 { 247 247 uint64_t v; 248 248 249 249 asm volatile ( 250 250 "mov %[value] = cr64\n" 251 251 : [value] "=r" (v) 252 252 ); 253 253 254 254 return v; 255 255 } … … 276 276 { 277 277 uint64_t v; 278 278 279 279 asm volatile ( 280 280 "mov %[value] = ar.itc\n" 281 281 : [value] "=r" (v) 282 282 ); 283 283 284 284 return v; 285 285 } … … 306 306 { 307 307 uint64_t v; 308 308 309 309 asm volatile ( 310 310 "mov %[value] = cr.itm\n" 311 311 : [value] "=r" (v) 312 312 ); 313 313 314 314 return v; 315 315 } … … 323 323 { 324 324 uint64_t v; 325 325 326 326 asm volatile ( 327 327 "mov %[value] = cr.itv\n" 328 328 : [value] "=r" (v) 329 329 ); 330 330 331 331 return v; 332 332 } … … 366 366 { 367 367 uint64_t v; 368 368 369 369 asm volatile ( 370 370 "mov %[value] = cr.tpr\n" 371 371 : [value] "=r" (v) 372 372 ); 373 373 374 374 return v; 375 375 } … … 399 399 { 400 400 uint64_t v; 401 401 402 402 asm volatile ( 403 403 "mov %[value] = psr\n" … … 406 406 : [mask] "i" (PSR_I_MASK) 407 407 ); 408 408 409 409 return (ipl_t) v; 410 410 } … … 421 421 { 422 422 uint64_t v; 423 423 424 424 asm volatile ( 425 425 "mov %[value] = psr\n" … … 430 430 : [mask] "i" (PSR_I_MASK) 431 431 ); 432 432 433 433 return (ipl_t) v; 434 434 } -
kernel/arch/ia64/include/arch/atomic.h
r3061bc1 ra35b458 41 41 { 42 42 atomic_count_t v; 43 43 44 44 asm volatile ( 45 45 "movl %[v] = 0x1;;\n" … … 48 48 [count] "+m" (val->count) 49 49 ); 50 50 51 51 return v; 52 52 } … … 62 62 { 63 63 atomic_count_t v; 64 64 65 65 asm volatile ( 66 66 "fetchadd8.rel %[v] = %[count], 1\n" … … 73 73 { 74 74 atomic_count_t v; 75 75 76 76 asm volatile ( 77 77 "fetchadd8.rel %[v] = %[count], -1\n" … … 84 84 { 85 85 atomic_count_t v; 86 86 87 87 asm volatile ( 88 88 "fetchadd8.rel %[v] = %[count], 1\n" … … 90 90 [count] "+m" (val->count) 91 91 ); 92 92 93 93 return (v + 1); 94 94 } … … 97 97 { 98 98 atomic_count_t v; 99 99 100 100 asm volatile ( 101 101 "fetchadd8.rel %[v] = %[count], -1\n" … … 103 103 [count] "+m" (val->count) 104 104 ); 105 105 106 106 return (v - 1); 107 107 } … … 110 110 { 111 111 atomic_count_t v; 112 112 113 113 asm volatile ( 114 114 "fetchadd8.rel %[v] = %[count], 1\n" … … 116 116 [count] "+m" (val->count) 117 117 ); 118 118 119 119 return v; 120 120 } … … 123 123 { 124 124 atomic_count_t v; 125 125 126 126 asm volatile ( 127 127 "fetchadd8.rel %[v] = %[count], -1\n" … … 129 129 [count] "+m" (val->count) 130 130 ); 131 131 132 132 return v; 133 133 } -
kernel/arch/ia64/include/arch/bootinfo.h
r3061bc1 ra35b458 44 44 char name[BOOTINFO_TASK_NAME_BUFLEN]; 45 45 } binit_task_t; 46 46 47 47 typedef struct { 48 48 size_t cnt; … … 58 58 typedef struct { 59 59 binit_t taskmap; 60 60 61 61 memmap_item_t memmap[MEMMAP_ITEMS]; 62 62 unsigned int memmap_items; 63 63 64 64 sysarg_t *sapic; 65 65 unsigned long sys_freq; -
kernel/arch/ia64/include/arch/cpu.h
r3061bc1 ra35b458 66 66 { 67 67 uint64_t v; 68 68 69 69 asm volatile ( 70 70 "mov %[v] = cpuid[%[r]]\n" … … 72 72 : [r] "r" (n) 73 73 ); 74 74 75 75 return v; 76 76 } -
kernel/arch/ia64/include/arch/istate.h
r3061bc1 ra35b458 65 65 { 66 66 /* FIXME */ 67 67 68 68 return 0; 69 69 } -
kernel/arch/ia64/include/arch/mm/page.h
r3061bc1 ra35b458 117 117 unsigned int ed : 1; 118 118 unsigned int ig1 : 11; 119 119 120 120 /* Word 1 */ 121 121 unsigned int : 2; … … 123 123 unsigned int key : 24; 124 124 unsigned int : 32; 125 125 126 126 /* Word 2 */ 127 127 union vhpt_tag tag; 128 128 129 129 /* Word 3 */ 130 130 uint64_t ig3 : 64; … … 136 136 unsigned long long ig0 : 52; 137 137 unsigned int ig1 : 11; 138 138 139 139 /* Word 1 */ 140 140 unsigned int : 2; 141 141 unsigned int ps : 6; 142 142 unsigned long long ig2 : 56; 143 143 144 144 /* Word 2 */ 145 145 union vhpt_tag tag; 146 146 147 147 /* Word 3 */ 148 148 uint64_t ig3 : 64; … … 194 194 { 195 195 uint64_t ret; 196 196 197 197 asm volatile ( 198 198 "thash %[ret] = %[va]\n" … … 200 200 : [va] "r" (va) 201 201 ); 202 202 203 203 return ret; 204 204 } … … 216 216 { 217 217 uint64_t ret; 218 218 219 219 asm volatile ( 220 220 "ttag %[ret] = %[va]\n" … … 222 222 : [va] "r" (va) 223 223 ); 224 224 225 225 return ret; 226 226 } … … 235 235 { 236 236 uint64_t ret; 237 237 238 238 assert(i < REGION_REGISTERS); 239 239 240 240 asm volatile ( 241 241 "mov %[ret] = rr[%[index]]\n" … … 243 243 : [index] "r" (i << VRN_SHIFT) 244 244 ); 245 245 246 246 return ret; 247 247 } … … 255 255 { 256 256 assert(i < REGION_REGISTERS); 257 257 258 258 asm volatile ( 259 259 "mov rr[%[index]] = %[value]\n" … … 270 270 { 271 271 uint64_t ret; 272 272 273 273 asm volatile ( 274 274 "mov %[ret] = cr.pta\n" 275 275 : [ret] "=r" (ret) 276 276 ); 277 277 278 278 return ret; 279 279 } -
kernel/arch/ia64/include/arch/mm/tlb.h
r3061bc1 ra35b458 63 63 unsigned int ed : 1; 64 64 unsigned int ig1 : 11; 65 65 66 66 /* Word 1 */ 67 67 unsigned int : 2; -
kernel/arch/ia64/include/arch/mm/vhpt.h
r3061bc1 ra35b458 32 32 /** @file 33 33 */ 34 34 35 35 #ifndef KERN_ia64_VHPT_H_ 36 36 #define KERN_ia64_VHPT_H_ … … 44 44 { 45 45 vhpt_entry_t ventry; 46 46 47 47 ventry.word[0] = tentry.word[0]; 48 48 ventry.word[1] = tentry.word[1]; 49 49 50 50 return ventry; 51 51 }
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