Changes in kernel/arch/ia32/src/smp/smp.c [1b20da0:a35b458] in mainline

File:

• kernel/arch/ia32/src/smp/smp.c (modified) (11 diffs)

kernel/arch/ia32/src/smp/smp.c

@@ -68 +68 @@
                 ops = &madt_config_operations;
         }
-        
+
         if (config.cpu_count == 1) {
                 mps_init();
                 ops = &mps_config_operations;
         }
-        
+
         if (config.cpu_count > 1) {
                 l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
@@ -86 +86 @@
         assert(ops != NULL);
         assert(cpus != NULL);
-        
+
         for (unsigned int i = 0; i < config.cpu_count; ++i) {
                 cpus[i].arch.id = ops->cpu_apic_id(i);
@@ -102 +102 @@
 {
         unsigned int i;
-        
+
         assert(ops != NULL);
 
@@ -110 +110 @@
          */
         cpu_arch_id_init();
-        
+
         /*
          * We need to access data in frame 0.
          * We boldly make use of kernel address space mapping.
          */
-        
+
         /*
          * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
@@ -122 +122 @@
             (uint16_t) (((uintptr_t) ap_boot) >> 4);  /* segment */
         *((uint16_t *) (PA2KA(0x467 + 2))) = 0;       /* offset */
-        
+
         /*
          * Save 0xa to address 0xf of the CMOS RAM.
@@ -129 +129 @@
         pio_write_8((ioport8_t *) 0x70, 0xf);
         pio_write_8((ioport8_t *) 0x71, 0xa);
-        
+
         pic_disable_irqs(0xffff);
         apic_init();
-        
+
         for (i = 0; i < config.cpu_count; i++) {
                 /*
@@ -139 +139 @@
                 if (!ops->cpu_enabled(i))
                         continue;
-                
+
                 /*
                  * The bootstrap processor is already up.
@@ -145 +145 @@
                 if (ops->cpu_bootstrap(i))
                         continue;
-                
+
                 if (ops->cpu_apic_id(i) == bsp_l_apic) {
                         log(LF_ARCH, LVL_ERROR, "kmp: bad processor entry #%u, "
@@ -151 +151 @@
                         continue;
                 }
-                
+
                 /*
                  * Prepare new GDT for CPU in question.
                  */
-                
+
                 /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
                  * it needs to be replaced by a generic fuctionality of
@@ -165 +165 @@
                 if (!gdt_new)
                         panic("Cannot allocate memory for GDT.");
-                
+
                 memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
                 memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
@@ -171 +171 @@
                 protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
                 gdtr.base = (uintptr_t) gdt_new;
-                
+
                 if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
                         /*