Changes in kernel/arch/ia32/src/interrupt.c [b2e121a:a35b458] in mainline
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kernel/arch/ia32/src/interrupt.c
rb2e121a ra35b458 72 72 "efl=%0#10" PRIx32 "\terr=%0#10" PRIx32 "\n", 73 73 istate->cs, istate->eip, istate->eflags, istate->error_word); 74 74 75 75 printf("ds =%0#10" PRIx32 "\tes =%0#10" PRIx32 "\t" 76 76 "fs =%0#10" PRIx32 "\tgs =%0#10" PRIx32 "\n", 77 77 istate->ds, istate->es, istate->fs, istate->gs); 78 78 79 79 if (istate_from_uspace(istate)) 80 80 printf("ss =%0#10" PRIx32 "\n", istate->ss); 81 81 82 82 printf("eax=%0#10" PRIx32 "\tebx=%0#10" PRIx32 "\t" 83 83 "ecx=%0#10" PRIx32 "\tedx=%0#10" PRIx32 "\n", 84 84 istate->eax, istate->ebx, istate->ecx, istate->edx); 85 85 86 86 printf("esi=%0#10" PRIx32 "\tedi=%0#10" PRIx32 "\t" 87 87 "ebp=%0#10" PRIx32 "\tesp=%0#10" PRIxn "\n", … … 119 119 size_t ver = TASK->arch.iomapver; 120 120 irq_spinlock_unlock(&TASK->lock, false); 121 121 122 122 if (CPU->arch.iomapver_copy != ver) { 123 123 /* … … 149 149 : [mxcsr] "=m" (mxcsr) 150 150 ); 151 151 152 152 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".", 153 153 mxcsr); … … 185 185 { 186 186 assert(n >= IVT_IRQBASE); 187 187 188 188 unsigned int inum = n - IVT_IRQBASE; 189 189 bool ack = false; 190 190 assert(inum < IRQ_COUNT); 191 191 assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1)); 192 192 193 193 irq_t *irq = irq_dispatch_and_lock(inum); 194 194 if (irq) { … … 196 196 * The IRQ handler was found. 197 197 */ 198 198 199 199 if (irq->preack) { 200 200 /* Send EOI before processing the interrupt */ … … 212 212 #endif 213 213 } 214 214 215 215 if (!ack) 216 216 trap_virtual_eoi(); … … 220 220 { 221 221 unsigned int i; 222 222 223 223 for (i = 0; i < IVT_ITEMS; i++) 224 224 exc_register(i, "null", false, (iroutine_t) null_interrupt); 225 225 226 226 for (i = 0; i < IRQ_COUNT; i++) { 227 227 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1)) … … 229 229 (iroutine_t) irq_interrupt); 230 230 } 231 231 232 232 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault); 233 233 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault); … … 235 235 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault); 236 236 exc_register(VECTOR_XM, "simd_fp", true, (iroutine_t) simd_fp_exception); 237 237 238 238 #ifdef CONFIG_SMP 239 239 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
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