Changeset a35b458 in mainline for kernel/arch/arm32/src
- Timestamp:
- 2018-03-02T20:10:49Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f1380b7
- Parents:
- 3061bc1
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)
- Location:
- kernel/arch/arm32/src
- Files:
-
- 12 edited
-
arm32.c (modified) (4 diffs)
-
asm.S (modified) (5 diffs)
-
atomic.c (modified) (1 diff)
-
context.S (modified) (1 diff)
-
exc_handler.S (modified) (1 diff)
-
exception.c (modified) (4 diffs)
-
interrupt.c (modified) (2 diffs)
-
mach/integratorcp/integratorcp.c (modified) (5 diffs)
-
mm/frame.c (modified) (2 diffs)
-
mm/page.c (modified) (3 diffs)
-
ras.c (modified) (1 diff)
-
start.S (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/arm32/src/arm32.c
r3061bc1 ra35b458 69 69 { 70 70 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); 71 71 72 72 size_t i; 73 73 for (i = 0; i < init.cnt; i++) { … … 93 93 { 94 94 machine_init(); 95 95 96 96 /* Initialize exception dispatch table */ 97 97 exception_init(); … … 100 100 /* Initialize Restartable Atomic Sequences support. */ 101 101 ras_init(); 102 102 103 103 machine_output_init(); 104 104 } … … 132 132 { 133 133 uint8_t *stck; 134 134 135 135 stck = &THREAD->kstack[STACK_SIZE]; 136 136 supervisor_sp = (uintptr_t) stck; -
kernel/arch/arm32/src/asm.S
r3061bc1 ra35b458 39 39 mov r5, r0 /* save dst */ 40 40 beq 4f 41 41 42 42 1: 43 43 cmp r2, #0 44 44 movne ip, #0 45 45 beq 3f 46 46 47 47 2: 48 48 ldrb r3, [ip, r1] … … 51 51 cmp ip, r2 52 52 bne 2b 53 53 54 54 3: 55 55 mov r0, r5 56 56 ldmia sp!, {r4, r5, pc} 57 57 58 58 4: 59 59 add r3, r0, #3 … … 66 66 mov lr, #0 67 67 mov ip, lr 68 68 69 69 5: 70 70 ldr r3, [ip, r1] … … 74 74 add ip, ip, #4 75 75 bne 5b 76 76 77 77 6: 78 78 ands r4, r2, #3 … … 82 82 add ip, r3, r1 83 83 mov r2, #0 84 84 85 85 7: 86 86 ldrb r3, [r2, ip] -
kernel/arch/arm32/src/atomic.c
r3061bc1 ra35b458 54 54 */ 55 55 irq_spinlock_lock(&cas_lock, true); 56 56 57 57 void * cur_val = *ptr; 58 58 59 59 if (cur_val == expected) { 60 60 *ptr = new_val; 61 61 } 62 62 63 63 irq_spinlock_unlock(&cas_lock, true); 64 64 65 65 return cur_val; 66 66 } -
kernel/arch/arm32/src/context.S
r3061bc1 ra35b458 54 54 ldmia r0!, {sp, lr} 55 55 ldmia r0!, {r4-r11} 56 56 57 57 mov r0, #0 58 58 mov pc, lr -
kernel/arch/arm32/src/exc_handler.S
r3061bc1 ra35b458 97 97 # Stop stack traces here 98 98 mov fp, #0 99 99 100 100 b 2f 101 101 -
kernel/arch/arm32/src/exception.c
r3061bc1 ra35b458 71 71 volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE - 72 72 PREFETCH_OFFSET; 73 73 74 74 /* make it LDR instruction and store at exception vector */ 75 75 *vector = handler_address_ptr | LDR_OPCODE; 76 76 smc_coherence(vector); 77 77 78 78 /* store handler's address */ 79 79 *(vector + EXC_VECTORS) = handler_addr; … … 99 99 install_handler((unsigned) reset_exception_entry, 100 100 (unsigned *) EXC_RESET_VEC); 101 101 102 102 install_handler((unsigned) undef_instr_exception_entry, 103 103 (unsigned *) EXC_UNDEF_INSTR_VEC); 104 104 105 105 install_handler((unsigned) swi_exception_entry, 106 106 (unsigned *) EXC_SWI_VEC); 107 107 108 108 install_handler((unsigned) prefetch_abort_exception_entry, 109 109 (unsigned *) EXC_PREFETCH_ABORT_VEC); 110 110 111 111 install_handler((unsigned) data_abort_exception_entry, 112 112 (unsigned *) EXC_DATA_ABORT_VEC); 113 113 114 114 install_handler((unsigned) irq_exception_entry, 115 115 (unsigned *) EXC_IRQ_VEC); 116 116 117 117 install_handler((unsigned) fiq_exception_entry, 118 118 (unsigned *) EXC_FIQ_VEC); … … 140 140 { 141 141 uint32_t control_reg = SCTLR_read(); 142 142 143 143 /* switch on the high vectors bit */ 144 144 control_reg |= SCTLR_HIGH_VECTORS_EN_FLAG; 145 145 146 146 SCTLR_write(control_reg); 147 147 } … … 190 190 #endif 191 191 install_exception_handlers(); 192 192 193 193 exc_register(EXC_UNDEF_INSTR, "undefined instruction", true, 194 194 (iroutine_t) undef_insn_exception); -
kernel/arch/arm32/src/interrupt.c
r3061bc1 ra35b458 49 49 50 50 current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl); 51 51 52 52 return ipl; 53 53 } … … 62 62 63 63 current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT); 64 64 65 65 return ipl; 66 66 } -
kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
r3061bc1 ra35b458 103 103 *(uint32_t *) ((char *)(icp.hw_map.vga) + 0x1C) = 0x182B; 104 104 *(uint32_t *) ((char *)(icp.hw_map.cmcr) + 0xC) = 0x33805000; 105 105 106 106 } 107 107 … … 259 259 uint32_t sources = icp_irqc_get_sources(); 260 260 unsigned int i; 261 261 262 262 for (i = 0; i < ICP_IRQC_MAX_IRQ; i++) { 263 263 if (sources & (1 << i)) { … … 295 295 vga_init = true; 296 296 } 297 297 298 298 fb_properties_t prop = { 299 299 .addr = ICP_FB, … … 304 304 .visual = VISUAL_RGB_8_8_8_0, 305 305 }; 306 306 307 307 outdev_t *fbdev = fb_init(&prop); 308 308 if (fbdev) … … 322 322 pl050->data = (ioport8_t *) icp.hw_map.kbd_data; 323 323 pl050->ctrl = (ioport8_t *) icp.hw_map.kbd_ctrl; 324 324 325 325 pl050_instance_t *pl050_instance = pl050_init(pl050, ICP_KBD_IRQ); 326 326 if (pl050_instance) { -
kernel/arch/arm32/src/mm/frame.c
r3061bc1 ra35b458 49 49 base = ALIGN_UP(base, FRAME_SIZE); 50 50 size = ALIGN_DOWN(size, FRAME_SIZE); 51 51 52 52 if (!frame_adjust_zone_bounds(low, &base, &size)) 53 53 return; … … 64 64 ZONE_AVAILABLE | ZONE_HIGHMEM); 65 65 } 66 66 67 67 } 68 68 -
kernel/arch/arm32/src/mm/page.c
r3061bc1 ra35b458 56 56 57 57 page_table_lock(AS_KERNEL, true); 58 58 59 59 /* Kernel identity mapping */ 60 60 //FIXME: We need to consider the possibility that … … 66 66 cur += FRAME_SIZE) 67 67 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 68 68 69 69 #ifdef HIGH_EXCEPTION_VECTORS 70 70 /* Create mapping for exception table at high offset */ … … 76 76 77 77 page_table_unlock(AS_KERNEL, true); 78 78 79 79 as_switch(NULL, AS_KERNEL); 80 80 81 81 boot_page_table_free(); 82 82 } -
kernel/arch/arm32/src/ras.c
r3061bc1 ra35b458 55 55 if (!frame) 56 56 frame = frame_alloc(1, FRAME_LOWMEM, 0); 57 57 58 58 ras_page = (uintptr_t *) km_map(frame, 59 59 PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE); 60 60 61 61 memsetb(ras_page, PAGE_SIZE, 0); 62 62 ras_page[RAS_START] = 0; -
kernel/arch/arm32/src/start.S
r3061bc1 ra35b458 60 60 orr r3, r4, #0x13 61 61 msr cpsr_c, r3 62 62 63 63 ldr sp, =temp_stack 64 64 65 65 bl arm32_pre_main 66 66 67 67 # 68 68 # Create the first stack frame.
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