Changeset a35b458 in mainline for boot/arch/sparc64/src
- Timestamp:
- 2018-03-02T20:10:49Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f1380b7
- Parents:
- 3061bc1
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-02-28 17:38:31)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:10:49)
- Location:
- boot/arch/sparc64/src
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/sparc64/src/asm.S
r3061bc1 ra35b458 65 65 1: 66 66 ! Disable interrupts and disable address masking. 67 67 68 68 wrpr %g0, PSTATE_PRIV_BIT, %pstate 69 69 70 70 wrpr %g0, NWINDOWS - 2, %cansave ! Set maximum saveable windows 71 71 wrpr %g0, 0, %canrestore ! Get rid of windows we will never need again 72 72 wrpr %g0, 0, %otherwin ! Make sure the window state is consistent 73 73 wrpr %g0, NWINDOWS - 1, %cleanwin ! Prevent needless clean_window traps for kernel 74 74 75 75 set initial_stack, %sp 76 76 add %sp, -STACK_BIAS, %sp 77 77 78 78 set ofw_cif, %l0 79 79 80 80 ! Initialize OpenFirmware 81 81 82 82 call ofw_init 83 83 stx %o4, [%l0] 84 84 85 85 ba %xcc, bootstrap 86 86 nop … … 105 105 * 3. Flush instruction pipeline. 106 106 */ 107 107 108 108 /* 109 109 * US3 processors have a write-invalidate cache, so explicitly … … 115 115 be %xcc, 1f 116 116 nop 117 117 118 118 0: 119 119 call icache_flush 120 120 nop 121 121 122 122 1: 123 123 membar #StoreStore 124 124 125 125 /* 126 126 * Flush the instruction pipeline. 127 127 */ 128 128 flush %i7 129 129 130 130 ! Jump to kernel 131 131 jmp %o3 … … 138 138 set ((ICACHE_SIZE - ICACHE_LINE_SIZE) | ICACHE_SET_BIT), %g1 139 139 stxa %g0, [%g1] ASI_ICACHE_TAG 140 140 141 141 0: 142 142 membar #Sync 143 143 subcc %g1, ICACHE_LINE_SIZE, %g1 144 144 bnz,pt %xcc, 0b 145 145 146 146 stxa %g0, [%g1] ASI_ICACHE_TAG 147 147 membar #Sync 148 148 retl 149 149 150 150 ! SF Erratum #51 151 151 152 152 nop 153 153 #else … … 161 161 set ofw_cif, %l0 162 162 ldx [%l0], %l0 163 163 164 164 rdpr %pstate, %l1 165 165 and %l1, ~PSTATE_AM_BIT, %l2 166 166 wrpr %l2, 0, %pstate 167 167 168 168 jmpl %l0, %o7 169 169 mov %i0, %o0 170 170 171 171 wrpr %l1, 0, %pstate 172 172 173 173 ret 174 174 restore %o0, 0, %o0 -
boot/arch/sparc64/src/main.c
r3061bc1 ra35b458 86 86 phandle root = ofw_find_device("/"); 87 87 char compatible[OFW_TREE_PROPERTY_MAX_VALUELEN]; 88 88 89 89 if (ofw_get_property(root, "compatible", compatible, 90 90 OFW_TREE_PROPERTY_MAX_VALUELEN) <= 0) { … … 93 93 return; 94 94 } 95 95 96 96 if (str_cmp(compatible, "sun4v") != 0) { 97 97 /* … … 122 122 : [ver] "=r" (ver) 123 123 ); 124 124 125 125 ver = (ver << 16) >> 48; 126 126 127 127 if ((ver >= FIRST_US3_CPU) && (ver <= LAST_US3_CPU)) { 128 128 subarch = SUBARCH_US3; 129 129 130 130 if (ver == US_IIIi_CODE) 131 131 mid_mask = (1 << 5) - 1; 132 132 else 133 133 mid_mask = (1 << 10) - 1; 134 134 135 135 } else if (ver < FIRST_US3_CPU) { 136 136 subarch = SUBARCH_US; … … 193 193 { 194 194 version_print(); 195 195 196 196 arch_detect(); 197 197 if (arch == ARCH_SUN4U) … … 199 199 else 200 200 subarch = SUBARCH_UNKNOWN; 201 201 202 202 bootinfo.physmem_start = ofw_get_physmem_start(); 203 203 ofw_memmap(&bootinfo.memmap); … … 205 205 if (arch == ARCH_SUN4V) 206 206 sun4v_fixups(); 207 207 208 208 void *bootinfo_pa = ofw_translate(&bootinfo); 209 209 void *kernel_address_pa = ofw_translate((void *) KERNEL_ADDRESS); 210 210 void *loader_address_pa = ofw_translate((void *) LOADER_ADDRESS); 211 211 212 212 printf("\nMemory statistics (total %" PRIu64 " MB, starting at %p)\n", 213 213 bootinfo.memmap.total >> 20, (void *) bootinfo.physmem_start); … … 217 217 printf(" %p|%p: loader entry point\n", 218 218 (void *) LOADER_ADDRESS, (void *) loader_address_pa); 219 219 220 220 size_t i; 221 221 for (i = 0; i < COMPONENTS; i++) … … 223 223 ofw_translate(components[i].addr), components[i].name, 224 224 components[i].inflated, components[i].size); 225 225 226 226 void *dest[COMPONENTS]; 227 227 size_t top = KERNEL_ADDRESS; … … 230 230 for (i = 0; i < min(COMPONENTS, TASKMAP_MAX_RECORDS); i++) { 231 231 top = ALIGN_UP(top, PAGE_SIZE); 232 232 233 233 if (i > 0) { 234 234 bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].addr = … … 236 236 bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].size = 237 237 components[i].inflated; 238 238 239 239 str_cpy(bootinfo.taskmap.tasks[bootinfo.taskmap.cnt].name, 240 240 BOOTINFO_TASK_NAME_BUFLEN, components[i].name); 241 241 242 242 bootinfo.taskmap.cnt++; 243 243 } 244 244 245 245 dest[i] = (void *) top; 246 246 top += components[i].inflated; 247 247 cnt++; 248 248 } 249 249 250 250 printf("\nInflating components ... "); 251 251 252 252 for (i = cnt; i > 0; i--) { 253 253 printf("%s ", components[i - 1].name); 254 254 255 255 /* 256 256 * At this point, we claim and map the physical memory that we … … 263 263 ofw_claim_phys(bootinfo.physmem_start + dest[i - 1], 264 264 ALIGN_UP(components[i - 1].inflated, PAGE_SIZE)); 265 265 266 266 ofw_map(bootinfo.physmem_start + dest[i - 1], dest[i - 1], 267 267 ALIGN_UP(components[i - 1].inflated, PAGE_SIZE), -1); 268 268 269 269 int err = inflate(components[i - 1].addr, components[i - 1].size, 270 270 dest[i - 1], components[i - 1].inflated); 271 271 272 272 if (err != EOK) { 273 273 printf("\n%s: Inflating error %d, halting.\n", … … 276 276 } 277 277 } 278 278 279 279 printf(".\n"); 280 280 281 281 /* 282 282 * Claim and map the physical memory for the boot allocator. … … 290 290 balloc_init(&bootinfo.ballocs, balloc_base, (uintptr_t) balloc_base, 291 291 BALLOC_MAX_SIZE); 292 292 293 293 printf("Setting up screens ...\n"); 294 294 ofw_setup_screens(); 295 295 296 296 printf("Canonizing OpenFirmware device tree ...\n"); 297 297 bootinfo.ofw_root = ofw_tree_build(); 298 298 299 299 if (arch == ARCH_SUN4U) 300 300 sun4u_smp(); 301 301 302 302 printf("Booting the kernel ...\n"); 303 303 jump_to_kernel(bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo, subarch, -
boot/arch/sparc64/src/ofw.c
r3061bc1 ra35b458 47 47 if (ch == '\n') 48 48 ofw_putchar('\r'); 49 49 50 50 if (ascii_check(ch)) 51 51 ofw_putchar(ch); … … 72 72 { 73 73 size_t cpus; 74 74 75 75 for (cpus = 0; (child != 0) && (child != (phandle) -1); 76 76 child = ofw_get_peer_node(child), cpus++) { 77 77 char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN]; 78 78 79 79 if (ofw_get_property(child, "device_type", type_name, 80 80 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) { 81 81 type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0; 82 82 83 83 if (str_cmp(type_name, "cpu") == 0) { 84 84 uint32_t mid; 85 85 86 86 /* 87 87 * "upa-portid" for US, "portid" for US-III, … … 92 92 && (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0)) 93 93 continue; 94 94 95 95 if (current_mid != mid) { 96 96 /* … … 104 104 } 105 105 } 106 106 107 107 return cpus; 108 108 } … … 115 115 /* Get the current CPU MID */ 116 116 uint64_t current_mid; 117 117 118 118 asm volatile ( 119 119 "ldxa [%[zero]] %[asi], %[current_mid]\n" … … 122 122 [asi] "i" (ASI_ICBUS_CONFIG) 123 123 ); 124 124 125 125 current_mid >>= ICBUS_CONFIG_MID_SHIFT; 126 126 current_mid &= mid_mask; 127 127 128 128 /* Wake up the CPUs */ 129 129 130 130 phandle cpus_parent = ofw_find_device("/ssm@0,0"); 131 131 if ((cpus_parent == 0) || (cpus_parent == (phandle) -1)) 132 132 cpus_parent = ofw_find_device("/"); 133 133 134 134 phandle node = ofw_get_child_node(cpus_parent); 135 135 size_t cpus = wake_cpus_in_node(node, current_mid, physmem_start); 136 136 137 137 while ((node != 0) && (node != (phandle) -1)) { 138 138 char name[OFW_TREE_PROPERTY_MAX_VALUELEN]; 139 139 140 140 if (ofw_get_property(node, "name", name, 141 141 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) { 142 142 name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0; 143 143 144 144 if (str_cmp(name, "cmp") == 0) { 145 145 phandle subnode = ofw_get_child_node(node); … … 148 148 } 149 149 } 150 150 151 151 node = ofw_get_peer_node(node); 152 152 } 153 153 154 154 if (cpus == 0) 155 155 printf("Warning: Unable to get CPU properties.\n"); … … 169 169 halt(); 170 170 } 171 171 172 172 return ((((uintptr_t) memreg[0]) << 32) | memreg[1]); 173 173 }
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