Changeset a2a5529 in mainline for kernel/arch/sparc64/include


Ignore:
Timestamp:
2008-11-11T07:50:04Z (17 years ago)
Author:
Jakub Vana <jakub.vana@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
59e4864
Parents:
b24786a3
Message:

Support for serial port console on IA64 as a compensation for keyboard - based on SPARC ns16550 driver

Location:
kernel/arch/sparc64/include
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/asm.h

    rb24786a3 ra2a5529  
    4444#include <arch/stack.h>
    4545
     46typedef uint64_t ioport_t;
     47
     48
     49static inline void  outb(ioport_t port,uint8_t v)
     50{
     51        *((uint8_t *)(port)) = v;
     52}
     53
     54static inline void  outw(ioport_t port,uint16_t v)
     55{
     56        *((uint16_t *)(port)) = v;
     57}
     58
     59static inline void  outl(ioport_t port,uint32_t v)
     60{
     61        *((uint32_t *)(port)) = v;
     62}
     63
     64
     65
     66static inline uint8_t inb(ioport_t port)
     67{
     68        return *((uint8_t *)(port));
     69}
     70
     71static inline uint16_t inw(ioport_t port)
     72{
     73        return *((uint16_t *)(port));
     74}
     75
     76static inline uint32_t inl(ioport_t port)
     77{
     78        return *((uint32_t *)(port));
     79}
     80
     81
     82
     83
     84
    4685/** Read Processor State register.
    4786 *
  • kernel/arch/sparc64/include/drivers/ns16550.h

    rb24786a3 ra2a5529  
    3636#define KERN_sparc64_NS16550_H_
    3737
    38 #include <arch/types.h>
    39 #include <arch/drivers/kbd.h>
    40 
    41 /* NS16550 registers */
    42 #define RBR_REG         0       /** Receiver Buffer Register. */
    43 #define IER_REG         1       /** Interrupt Enable Register. */
    44 #define IIR_REG         2       /** Interrupt Ident Register (read). */
    45 #define FCR_REG         2       /** FIFO control register (write). */
    46 #define LCR_REG         3       /** Line Control register. */
    47 #define LSR_REG         5       /** Line Status Register. */
    48 
    49 #define IER_ERBFI       0x01    /** Enable Receive Buffer Full Interrupt. */
    50 
    51 #define LCR_DLAB        0x80    /** Divisor Latch Access bit. */
    52 
    53 /** Structure representing the ns16550 device. */
    54 typedef struct {
    55         devno_t devno;
    56         volatile uint8_t *reg;  /** Memory mapped registers of the ns16550. */
    57 } ns16550_t;
    58 
    59 static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
    60 {
    61         return dev->reg[RBR_REG];
    62 }
    63 
    64 static inline uint8_t ns16550_ier_read(ns16550_t *dev)
    65 {
    66         return dev->reg[IER_REG];
    67 }
    68 
    69 static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
    70 {
    71         dev->reg[IER_REG] = v;
    72 }
    73 
    74 static inline uint8_t ns16550_iir_read(ns16550_t *dev)
    75 {
    76         return dev->reg[IIR_REG];
    77 }
    78 
    79 static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
    80 {
    81         dev->reg[FCR_REG] = v;
    82 }
    83 
    84 static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
    85 {
    86         return dev->reg[LCR_REG];
    87 }
    88 
    89 static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
    90 {
    91         dev->reg[LCR_REG] = v;
    92 }
    93 
    94 static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
    95 {
    96         return dev->reg[LSR_REG];
    97 }
    9838
    9939#endif
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