Index: kernel/arch/ia64/include/asm.h
===================================================================
--- kernel/arch/ia64/include/asm.h	(revision 756f4753fa37ef910b4d545433823df917b7269e)
+++ kernel/arch/ia64/include/asm.h	(revision a2a552922110e12b1296ecc23f36d826e7fc4040)
@@ -40,8 +40,9 @@
 #include <arch/register.h>
 
+typedef uint64_t ioport_t;
 
 #define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
 
-static inline void  outb(uint64_t port,uint8_t v)
+static inline void  outb(ioport_t port,uint8_t v)
 {
 	*((uint8_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
@@ -50,5 +51,5 @@
 }
 
-static inline void  outw(uint64_t port,uint16_t v)
+static inline void  outw(ioport_t port,uint16_t v)
 {
 	*((uint16_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
@@ -57,5 +58,5 @@
 }
 
-static inline void  outl(uint64_t port,uint32_t v)
+static inline void  outl(ioport_t port,uint32_t v)
 {
 	*((uint32_t *)(IA64_IOSPACE_ADDRESS + ( (port & 0xfff) | ( (port >> 2) << 12 )))) = v;
@@ -66,5 +67,5 @@
 
 
-static inline uint8_t inb(uint64_t port)
+static inline uint8_t inb(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
@@ -73,5 +74,5 @@
 }
 
-static inline uint16_t inw(uint64_t port)
+static inline uint16_t inw(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
@@ -80,5 +81,5 @@
 }
 
-static inline uint32_t inl(uint64_t port)
+static inline uint32_t inl(ioport_t port)
 {
 	asm volatile ("mf\n" ::: "memory");
@@ -99,7 +100,12 @@
 	uint64_t v;
 
-	asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
-	
-	return v;
+	//I'm not sure why but this code bad inlines in scheduler, 
+	//so THE shifts about 16B and causes kernel panic
+	//asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
+	//return v;
+	
+	//this code have the same meaning but inlines well
+	asm volatile ("mov %0 = r12" : "=r" (v)  );
+	return v & (~(STACK_SIZE-1));
 }
 
@@ -152,4 +158,14 @@
 	return v;
 }
+
+static inline uint64_t cr64_read(void)
+{
+	uint64_t v;
+	
+	asm volatile ("mov %0 = cr64\n" : "=r" (v));
+	
+	return v;
+}
+
 
 /** Write ITC (Interval Timer Counter) register.
