Changeset a1b9f63 in mainline for kernel/arch


Ignore:
Timestamp:
2018-08-31T10:32:40Z (7 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6bf5b8c
Parents:
b1834a01
git-author:
Jakub Jermar <jakub@…> (2018-08-31 09:54:11)
git-committer:
Jakub Jermar <jakub@…> (2018-08-31 10:32:40)
Message:

Add alignment argument to km_map()

km_map() currently always applies alignment requirement equal to the
size of the mapped region. Most of the time, the natural alignment is
unnecessarily strong and especially on 32-bit systems may contribute to
km_map() failures for regions with size in the order of several hundred
megabytes.

This change adds an extra argument to km_map() which allows the caller
to indicate the desired alignment. The old behaviour can be specified
by passing KM_NATURAL_ALIGNMENT as alignment.

This change only adds the alignment argument, but does not change the
alignment requirement anywhere.

Location:
kernel/arch
Files:
14 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/src/vreg.c

    rb1834a01 ra1b9f63  
    6666                panic("Cannot allocate VREG frame.");
    6767
    68         page = (uint64_t *) km_map(frame, PAGE_SIZE,
     68        page = (uint64_t *) km_map(frame, PAGE_SIZE, PAGE_SIZE,
    6969            PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
    7070

  • kernel/arch/arm32/src/mach/beagleboardxm/beagleboardxm.c

    rb1834a01 ra1b9f63  
    102102        beagleboard.irc_addr =
    103103            (void *) km_map(AMDM37x_IRC_BASE_ADDRESS, AMDM37x_IRC_SIZE,
    104             PAGE_NOT_CACHEABLE);
     104            KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    105105        assert(beagleboard.irc_addr);
    106106        omap_irc_init(beagleboard.irc_addr);

  • kernel/arch/arm32/src/mach/beaglebone/beaglebone.c

    rb1834a01 ra1b9f63  
    8888{
    8989        bbone.irc_addr = (void *) km_map(AM335x_IRC_BASE_ADDRESS,
    90             AM335x_IRC_SIZE, PAGE_NOT_CACHEABLE);
     90            AM335x_IRC_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    9191
    9292        bbone.cm_per_addr = (void *) km_map(AM335x_CM_PER_BASE_ADDRESS,
    93             AM335x_CM_PER_SIZE, PAGE_NOT_CACHEABLE);
     93            AM335x_CM_PER_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    9494
    9595        bbone.cm_dpll_addr = (void *) km_map(AM335x_CM_DPLL_BASE_ADDRESS,
    96             AM335x_CM_DPLL_SIZE, PAGE_NOT_CACHEABLE);
     96            AM335x_CM_DPLL_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    9797
    9898        bbone.ctrl_module = (void *) km_map(AM335x_CTRL_MODULE_BASE_ADDRESS,
    99             AM335x_CTRL_MODULE_SIZE, PAGE_NOT_CACHEABLE);
     99            AM335x_CTRL_MODULE_SIZE, KM_NATURAL_ALIGNMENT,
     100            PAGE_NOT_CACHEABLE);
    100101
    101102        assert(bbone.irc_addr != NULL);

  • kernel/arch/arm32/src/mach/gta02/gta02.c

    rb1834a01 ra1b9f63  
    103103
    104104        gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE,
    105             PAGE_NOT_CACHEABLE);
    106         irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE,
     105            PAGE_SIZE, PAGE_NOT_CACHEABLE);
     106        irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE, PAGE_SIZE,
    107107            PAGE_NOT_CACHEABLE);
    108108

  • kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

    rb1834a01 ra1b9f63  
    135135void icp_init(void)
    136136{
    137         icp.hw_map.uart = km_map(ICP_UART, PAGE_SIZE,
    138             PAGE_WRITE | PAGE_NOT_CACHEABLE);
    139         icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE);
     137        icp.hw_map.uart = km_map(ICP_UART, PAGE_SIZE, PAGE_SIZE,
     138            PAGE_WRITE | PAGE_NOT_CACHEABLE);
     139        icp.hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_SIZE,
     140            PAGE_NOT_CACHEABLE);
    140141        icp.hw_map.kbd_stat = icp.hw_map.kbd_ctrl + ICP_KBD_STAT;
    141142        icp.hw_map.kbd_data = icp.hw_map.kbd_ctrl + ICP_KBD_DATA;
    142143        icp.hw_map.kbd_intstat = icp.hw_map.kbd_ctrl + ICP_KBD_INTR_STAT;
    143         icp.hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE,
     144        icp.hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE, PAGE_SIZE,
    144145            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    145146        icp.hw_map.rtc1_load = icp.hw_map.rtc + ICP_RTC1_LOAD_OFFSET;
    … …  
    150151        icp.hw_map.rtc1_intrstat = icp.hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET;
    151152
    152         icp.hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE,
     153        icp.hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE, PAGE_SIZE,
    153154            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    154155        icp.hw_map.irqc_mask = icp.hw_map.irqc + ICP_IRQC_MASK_OFFSET;
    155156        icp.hw_map.irqc_unmask = icp.hw_map.irqc + ICP_IRQC_UNMASK_OFFSET;
    156         icp.hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE,
     157        icp.hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE, PAGE_SIZE,
    157158            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    158159        icp.hw_map.sdramcr = icp.hw_map.cmcr + ICP_SDRAMCR_OFFSET;
    159         icp.hw_map.vga = km_map(ICP_VGA, PAGE_SIZE,
     160        icp.hw_map.vga = km_map(ICP_VGA, PAGE_SIZE, PAGE_SIZE,
    160161            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    161162

  • kernel/arch/arm32/src/mach/raspberrypi/raspberrypi.c

    rb1834a01 ra1b9f63  
    103103        /* Initialize interrupt controller */
    104104        raspi.irc = (void *) km_map(BCM2835_IRC_ADDR, sizeof(bcm2835_irc_t),
    105             PAGE_NOT_CACHEABLE);
     105            KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    106106        assert(raspi.irc);
    107107        bcm2835_irc_init(raspi.irc);
    … …  
    109109        /* Initialize system timer */
    110110        raspi.timer = (void *) km_map(BCM2835_TIMER_ADDR,
    111             sizeof(bcm2835_timer_t),
    112             PAGE_NOT_CACHEABLE);
     111            sizeof(bcm2835_timer_t), KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
    113112}
    114113

  • kernel/arch/arm32/src/ras.c

    rb1834a01 ra1b9f63  
    5656                frame = frame_alloc(1, FRAME_LOWMEM, 0);
    5757
    58         ras_page = (uintptr_t *) km_map(frame,
    59             PAGE_SIZE, PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
     58        ras_page = (uintptr_t *) km_map(frame, PAGE_SIZE, PAGE_SIZE,
     59            PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
    6060
    6161        memsetb(ras_page, PAGE_SIZE, 0);

  • kernel/arch/ia32/src/smp/smp.c

    rb1834a01 ra1b9f63  
    7676        if (config.cpu_count > 1) {
    7777                l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
    78                     PAGE_WRITE | PAGE_NOT_CACHEABLE);
     78                    PAGE_SIZE, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    7979                io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE,
    80                     PAGE_WRITE | PAGE_NOT_CACHEABLE);
     80                    PAGE_SIZE, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    8181        }
    8282}

  • kernel/arch/ia32/src/vreg.c

    rb1834a01 ra1b9f63  
    6767                panic("Cannot allocate VREG frame.");
    6868
    69         page = (uint32_t *) km_map(frame, PAGE_SIZE,
     69        page = (uint32_t *) km_map(frame, PAGE_SIZE, PAGE_SIZE,
    7070            PAGE_READ | PAGE_WRITE | PAGE_USER | PAGE_CACHEABLE);
    7171

  • kernel/arch/ia64/src/ia64.c

    rb1834a01 ra1b9f63  
    106106static void iosapic_init(void)
    107107{
    108         uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE,
     108        uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE, PAGE_SIZE,
    109109            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    110110        int i;
    … …  
    136136                /* Map the page with legacy I/O. */
    137137                legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE,
    138                     PAGE_WRITE | PAGE_NOT_CACHEABLE);
     138                    KM_NATURAL_ALIGNMENT, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    139139
    140140                iosapic_init();

  • kernel/arch/ppc32/src/drivers/pic.c

    rb1834a01 ra1b9f63  
    4242void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg)
    4343{
    44         pic = (uint32_t *) km_map(base, size, PAGE_WRITE | PAGE_NOT_CACHEABLE);
     44        pic = (uint32_t *) km_map(base, size, KM_NATURAL_ALIGNMENT,
     45            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    4546        *cir = pic_ack_interrupt;
    4647        *cir_arg = NULL;

  • kernel/arch/ppc32/src/ppc32.c

    rb1834a01 ra1b9f63  
    242242
    243243                cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size,
     244                    KM_NATURAL_ALIGNMENT,
    244245                    PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
    245246

  • kernel/arch/sparc64/src/drivers/kbd.c

    rb1834a01 ra1b9f63  
    119119
    120120        ioport8_t *ns16550 = (ioport8_t *) (km_map(aligned_addr, offset + size,
    121             PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
     121            KM_NATURAL_ALIGNMENT, PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
    122122
    123123        ns16550_instance_t *ns16550_instance = ns16550_init(ns16550, 0, inr, cir,

  • kernel/arch/sparc64/src/drivers/pci.c

    rb1834a01 ra1b9f63  
    110110        pci->op = &pci_sabre_ops;
    111111        pci->reg = (uint64_t *) km_map(paddr, reg[SABRE_INTERNAL_REG].size,
    112             PAGE_WRITE | PAGE_NOT_CACHEABLE);
     112            KM_NATURAL_ALIGNMENT, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    113113
    114114        return pci;
    … …  
    152152        pci->op = &pci_psycho_ops;
    153153        pci->reg = (uint64_t *) km_map(paddr, reg[PSYCHO_INTERNAL_REG].size,
    154             PAGE_WRITE | PAGE_NOT_CACHEABLE);
     154            KM_NATURAL_ALIGNMENT, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    155155
    156156        return pci;
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