Changeset 96e01fbc in mainline for uspace/lib/c/arch/arm32

Timestamp:

2012-08-31T17:30:29Z (13 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

2be2506a

Parents:

e0d5bc5 (diff), 0d57c3e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes.

Location:

uspace/lib/c/arch/arm32

Files:

• _link.ld.in (modified) (1 diff)
• include/types.h (modified) (1 diff)
• src/fibril.S (modified) (2 diffs)
• src/stacktrace_asm.S (modified) (1 diff)
• src/thread_entry.s (modified) (1 diff)

uspace/lib/c/arch/arm32/_link.ld.in

@@ -14 +14 @@
 SECTIONS {
 #ifdef LOADER
+        . = 0x70001000 + SIZEOF_HEADERS;
+        
         .interp : {
                 *(.interp);
-        } :interp
-        
-        . = 0x70001000 + SIZEOF_HEADERS;
+        } :interp :text
 #else
         . = 0x1000 + SIZEOF_HEADERS;
 #endif
+        
+        /* Make sure the code is aligned reasonably */
+        . = ALIGN(., 8);
+        
         .init : {
                 *(.init);

uspace/lib/c/arch/arm32/include/types.h

@@ -48 +48 @@
 
 typedef uint32_t sysarg_t;
+typedef int32_t native_t;
 
 typedef int32_t ssize_t;

uspace/lib/c/arch/arm32/src/fibril.S

@@ -35 +35 @@
         stmia r0!, {sp, lr}
         stmia r0!, {r4-r11}
-
+        
         # return 1
         mov r0, #1
@@ -43 +43 @@
         ldmia r0!, {sp, lr}
         ldmia r0!, {r4-r11}
-
-        #return 0
+        
+        # return 0
         mov r0, #0
         mov pc, lr

uspace/lib/c/arch/arm32/src/stacktrace_asm.S

@@ -41 +41 @@
 
 stacktrace_pc_get:
-        mov r0, lr 
+        mov r0, lr
         mov pc, lr

uspace/lib/c/arch/arm32/src/thread_entry.s

@@ -42 +42 @@
         push {fp, ip, lr, pc}
         sub fp, ip, #4
-
-        b __thread_main
+        
+        b __thread_main