Changeset 965dc18 in mainline for kernel/arch/sparc64/src/mm/tsb.c
- Timestamp:
- 2008-12-05T19:59:03Z (17 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 49093a4
- Parents:
- 0258e67
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/tsb.c
r0258e67 r965dc18 113 113 tsb->data.size = PAGESIZE_8K; 114 114 tsb->data.pfn = (t->frame >> MMU_FRAME_WIDTH) + index; 115 tsb->data.cp = t->c; 116 tsb->data.p = t->k; /* p as privileged*/117 tsb->data.v = t->p; 115 tsb->data.cp = t->c; /* cp as cache in phys.-idxed, c as cacheable */ 116 tsb->data.p = t->k; /* p as privileged, k as kernel */ 117 tsb->data.v = t->p; /* v as valid, p as present */ 118 118 119 119 write_barrier(); … … 174 174 /** @} 175 175 */ 176
Note:
See TracChangeset
for help on using the changeset viewer.