- Timestamp:
- 2005-12-06T20:53:03Z (20 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 36e7b6c3
- Parents:
- 090e7ea1
- Location:
- arch
- Files:
-
- 2 edited
-
ia32/Makefile.inc (modified) (2 diffs)
-
mips32/Makefile.inc (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
-
arch/ia32/Makefile.inc
r090e7ea1 r9371c30 39 39 # 40 40 41 ifndef CPU42 CPU = pentium441 ifndef IA32_CPU 42 IA32_CPU = pentium4 43 43 endif 44 44 45 DEFS += -D_CPU=${ CPU}45 DEFS += -D_CPU=${IA32_CPU} 46 46 47 47 ## Accepted CPUs 48 48 # 49 49 50 ifeq ($( CPU),athlon-xp)50 ifeq ($(IA32_CPU),athlon-xp) 51 51 CFLAGS += -march=athlon-xp -mmmx -msse -m3dnow 52 52 DEFS += -DCONFIG_FENCES_P3 … … 54 54 CONFIG_HT = n 55 55 endif 56 ifeq ($( CPU),athlon-mp)56 ifeq ($(IA32_CPU),athlon-mp) 57 57 CFLAGS += -march=athlon-mp -mmmx -msse -m3dnow 58 58 DEFS += -DCONFIG_FENCES_P3 59 59 CONFIG_HT = n 60 60 endif 61 ifeq ($( CPU),pentium3)61 ifeq ($(IA32_CPU),pentium3) 62 62 CFLAGS += -march=pentium3 -mmmx -msse 63 63 DEFS += -DCONFIG_FENCES_P3 64 64 CONFIG_HT = n 65 65 endif 66 ifeq ($( CPU),prescott)66 ifeq ($(IA32_CPU),prescott) 67 67 CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 -msse3 68 68 DEFS += -DCONFIG_FENCES_P4 69 69 endif 70 ifeq ($( CPU),pentium4)70 ifeq ($(IA32_CPU),pentium4) 71 71 CFLAGS += -march=pentium4 -mfpmath=sse -mmmx -msse -msse2 72 72 DEFS += -DCONFIG_FENCES_P4 -
arch/mips32/Makefile.inc
r090e7ea1 r9371c30 37 37 # 38 38 39 ifndef M ACHINE40 M ACHINE = msim39 ifndef MIPS_MACHINE 40 MIPS_MACHINE = msim 41 41 endif 42 42 … … 45 45 INIT_SIZE = 65536 46 46 CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss 47 DEFS += -DMACHINE=${M ACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}47 DEFS += -DMACHINE=${MIPS_MACHINE} -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE} 48 48 49 49 ## Accepted MACHINEs 50 50 # 51 51 52 ifeq ($(M ACHINE),indy)52 ifeq ($(MIPS_MACHINE),indy) 53 53 # GCC 4.0.1 compiled for mipsEL has problems compiling in 54 54 # BigEndian mode with the swl/swr/lwl/lwr instructions. … … 62 62 CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -march=r4600 63 63 endif 64 ifeq ($(M ACHINE),lgxemul)64 ifeq ($(MIPS_MACHINE),lgxemul) 65 65 BFD_NAME=elf32-tradlittlemips 66 66 BFD = ecoff-littlemips 67 67 CFLAGS += -DHAVE_FPU -mips3 68 68 endif 69 ifeq ($(M ACHINE),bgxemul)69 ifeq ($(MIPS_MACHINE),bgxemul) 70 70 BFD_NAME=elf32-bigmips 71 71 BFD = ecoff-bigmips … … 74 74 CFLAGS += -EB -DBIG_ENDIAN -DHAVE_FPU -mips3 75 75 endif 76 ifeq ($(M ACHINE),msim4kc)76 ifeq ($(MIPS_MACHINE),msim4kc) 77 77 # MSIM needs lwl/swl patch & 4kc instruction patch to work 78 78 # otherwise add -mmemcpy -mips3 … … 82 82 CFLAGS += -mhard-float -march=4kc 83 83 endif 84 ifeq ($(M ACHINE),simics)84 ifeq ($(MIPS_MACHINE),simics) 85 85 # SIMICS 4kc emulation is broken, although for instructions 86 86 # that do not bother us … … 90 90 CFLAGS += -mhard-float -mips3 91 91 endif 92 ifeq ($(M ACHINE),msim)92 ifeq ($(MIPS_MACHINE),msim) 93 93 BFD_NAME = elf32-tradlittlemips 94 94 BFD = binary 95 95 CFLAGS += -mhard-float -mips3 96 96 endif 97 98 ## Own configuration directives99 #100 101 CONFIG_OFW = y102 97 103 98 ## Accepted configuration directives
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