Changeset 8fb1bf82 in mainline for kernel/arch/mips32/include
- Timestamp:
- 2010-11-25T13:42:50Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8df8415
- Parents:
- a93d79a (diff), eb667613 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- kernel/arch/mips32/include
- Files:
-
- 1 added
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/cp0.h
ra93d79a r8fb1bf82 36 36 #define KERN_mips32_CP0_H_ 37 37 38 #ifdef KERNEL 38 39 #include <typedefs.h> 40 #else 41 #include <sys/types.h> 42 #endif 39 43 40 44 #define cp0_status_ie_enabled_bit (1 << 0) -
kernel/arch/mips32/include/exception.h
ra93d79a r8fb1bf82 37 37 38 38 #include <typedefs.h> 39 #include <arch/cp0.h> 40 #include <trace.h> 39 #include <arch/istate.h> 41 40 42 41 #define EXC_Int 0 … … 59 58 #define EXC_VCED 31 60 59 61 typedef struct istate {62 /*63 * The first seven registers are arranged so that the istate structure64 * can be used both for exception handlers and for the syscall handler.65 */66 uint32_t a0; /* arg1 */67 uint32_t a1; /* arg2 */68 uint32_t a2; /* arg3 */69 uint32_t a3; /* arg4 */70 uint32_t t0; /* arg5 */71 uint32_t t1; /* arg6 */72 uint32_t v0; /* arg7 */73 uint32_t v1;74 uint32_t at;75 uint32_t t2;76 uint32_t t3;77 uint32_t t4;78 uint32_t t5;79 uint32_t t6;80 uint32_t t7;81 uint32_t s0;82 uint32_t s1;83 uint32_t s2;84 uint32_t s3;85 uint32_t s4;86 uint32_t s5;87 uint32_t s6;88 uint32_t s7;89 uint32_t t8;90 uint32_t t9;91 uint32_t kt0;92 uint32_t kt1; /* We use it as thread-local pointer */93 uint32_t gp;94 uint32_t sp;95 uint32_t s8;96 uint32_t ra;97 98 uint32_t lo;99 uint32_t hi;100 101 uint32_t status; /* cp0_status */102 uint32_t epc; /* cp0_epc */103 104 uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */105 } istate_t;106 107 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,108 uintptr_t retaddr)109 {110 istate->epc = retaddr;111 }112 113 /** Return true if exception happened while in userspace */114 NO_TRACE static inline int istate_from_uspace(istate_t *istate)115 {116 return istate->status & cp0_status_um_bit;117 }118 119 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)120 {121 return istate->epc;122 }123 124 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)125 {126 return istate->sp;127 }128 129 60 extern void exception(istate_t *istate); 130 61 extern void tlb_refill_entry(void); -
kernel/arch/mips32/include/types.h
ra93d79a r8fb1bf82 50 50 } fncptr_t; 51 51 52 #define PRIp "x" /**< Format for uintptr_t. */ 53 #define PRIs "u" /**< Format for size_t. */ 54 55 #define PRId8 "d" /**< Format for int8_t. */ 56 #define PRId16 "d" /**< Format for int16_t. */ 57 #define PRId32 "ld" /**< Format for int32_t. */ 58 #define PRId64 "lld" /**< Format for int64_t. */ 59 #define PRIdn "d" /**< Format for native_t. */ 60 61 #define PRIu8 "u" /**< Format for uint8_t. */ 62 #define PRIu16 "u" /**< Format for uint16_t. */ 63 #define PRIu32 "u" /**< Format for uint32_t. */ 64 #define PRIu64 "llu" /**< Format for uint64_t. */ 65 #define PRIun "u" /**< Format for unative_t. */ 66 67 #define PRIx8 "x" /**< Format for hexadecimal (u)int8_t. */ 68 #define PRIx16 "x" /**< Format for hexadecimal (u)int16_t. */ 69 #define PRIx32 "x" /**< Format for hexadecimal (u)uint32_t. */ 70 #define PRIx64 "llx" /**< Format for hexadecimal (u)int64_t. */ 71 #define PRIxn "x" /**< Format for hexadecimal (u)native_t. */ 52 #define PRIp PRIx32 /**< Format for uintptr_t. */ 53 #define PRIs PRIu32 /**< Format for size_t. */ 54 #define PRIdn PRId32 /**< Format for native_t. */ 55 #define PRIun PRIu32 /**< Format for unative_t. */ 56 #define PRIxn PRIx32 /**< Format for hexadecimal unative_t. */ 72 57 73 58 #endif
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