Changeset 8df5f20 in mainline for kernel/arch/mips32/include
- Timestamp:
- 2019-02-11T14:56:26Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4805495
- Parents:
- 391996b
- git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-01 23:26:21)
- git-committer:
- Jiří Zárevúcky <zarevucky.jiri@…> (2019-02-11 14:56:26)
- Location:
- kernel/arch/mips32/include/arch
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/include/arch/asm.h
r391996b r8df5f20 40 40 #include <trace.h> 41 41 42 NO_TRACE static inline void cpu_sleep(void)42 _NO_TRACE static inline void cpu_sleep(void) 43 43 { 44 44 asm volatile ("wait"); … … 52 52 * 53 53 */ 54 NO_TRACE static inline uintptr_t get_stack_base(void)54 _NO_TRACE static inline uintptr_t get_stack_base(void) 55 55 { 56 56 uintptr_t base; … … 65 65 } 66 66 67 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)67 _NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) 68 68 { 69 69 *port = v; 70 70 } 71 71 72 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)72 _NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) 73 73 { 74 74 *port = v; 75 75 } 76 76 77 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)77 _NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) 78 78 { 79 79 *port = v; 80 80 } 81 81 82 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)82 _NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) 83 83 { 84 84 return *port; 85 85 } 86 86 87 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)87 _NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) 88 88 { 89 89 return *port; 90 90 } 91 91 92 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)92 _NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) 93 93 { 94 94 return *port; -
kernel/arch/mips32/include/arch/cycle.h
r391996b r8df5f20 40 40 #include <trace.h> 41 41 42 NO_TRACE static inline uint64_t get_cycle(void)42 _NO_TRACE static inline uint64_t get_cycle(void) 43 43 { 44 44 return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); -
kernel/arch/mips32/include/arch/istate.h
r391996b r8df5f20 50 50 #endif /* KERNEL */ 51 51 52 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,52 _NO_TRACE static inline void istate_set_retaddr(istate_t *istate, 53 53 uintptr_t retaddr) 54 54 { … … 57 57 58 58 /** Return true if exception happened while in userspace */ 59 NO_TRACE static inline int istate_from_uspace(istate_t *istate)59 _NO_TRACE static inline int istate_from_uspace(istate_t *istate) 60 60 { 61 61 return istate->status & cp0_status_um_bit; 62 62 } 63 63 64 NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)64 _NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) 65 65 { 66 66 return istate->epc; 67 67 } 68 68 69 NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)69 _NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) 70 70 { 71 71 return istate->sp; -
kernel/arch/mips32/include/arch/mm/page.h
r391996b r8df5f20 161 161 } pte_t; 162 162 163 NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)163 _NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) 164 164 { 165 165 pte_t *p = &pt[i]; … … 174 174 } 175 175 176 NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)176 _NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) 177 177 { 178 178 pte_t *p = &pt[i]; … … 189 189 } 190 190 191 NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i)191 _NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) 192 192 { 193 193 pte_t *p = &pt[i]; -
kernel/arch/mips32/include/arch/mm/tlb.h
r391996b r8df5f20 135 135 * Probe TLB for Matching Entry. 136 136 */ 137 NO_TRACE static inline void tlbp(void)137 _NO_TRACE static inline void tlbp(void) 138 138 { 139 139 asm volatile ("tlbp\n\t"); … … 144 144 * Read Indexed TLB Entry. 145 145 */ 146 NO_TRACE static inline void tlbr(void)146 _NO_TRACE static inline void tlbr(void) 147 147 { 148 148 asm volatile ("tlbr\n\t"); … … 153 153 * Write Indexed TLB Entry. 154 154 */ 155 NO_TRACE static inline void tlbwi(void)155 _NO_TRACE static inline void tlbwi(void) 156 156 { 157 157 asm volatile ("tlbwi\n\t"); … … 162 162 * Write Random TLB Entry. 163 163 */ 164 NO_TRACE static inline void tlbwr(void)164 _NO_TRACE static inline void tlbwr(void) 165 165 { 166 166 asm volatile ("tlbwr\n\t");
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