Changes in uspace/drv/bus/usb/ehci/res.c [7de1988c:8d40181] in mainline
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uspace/drv/bus/usb/ehci/res.c (modified) (10 diffs)
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uspace/drv/bus/usb/ehci/res.c
r7de1988c r8d40181 67 67 #define WAIT_STEP 10 68 68 69 70 /** Get address of registers and IRQ for given device.71 *72 * @param[in] dev Device asking for the addresses.73 * @param[out] mem_regs_p Pointer to the register range.74 * @param[out] irq_no IRQ assigned to the device.75 * @return Error code.76 */77 int get_my_registers(ddf_dev_t *dev,78 addr_range_t *mem_regs_p, int *irq_no)79 {80 assert(dev);81 82 async_sess_t *parent_sess = devman_parent_device_connect(83 EXCHANGE_SERIALIZE, ddf_dev_get_handle(dev), IPC_FLAG_BLOCKING);84 if (!parent_sess)85 return ENOMEM;86 87 hw_res_list_parsed_t hw_res;88 hw_res_list_parsed_init(&hw_res);89 const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0);90 async_hangup(parent_sess);91 if (ret != EOK) {92 return ret;93 }94 95 if (hw_res.irqs.count != 1 || hw_res.mem_ranges.count != 1) {96 hw_res_list_parsed_clean(&hw_res);97 return ENOENT;98 }99 100 if (mem_regs_p)101 *mem_regs_p = hw_res.mem_ranges.ranges[0];102 if (irq_no)103 *irq_no = hw_res.irqs.irqs[0];104 105 hw_res_list_parsed_clean(&hw_res);106 return EOK;107 }108 109 /** Calls the PCI driver with a request to enable interrupts110 *111 * @param[in] device Device asking for interrupts112 * @return Error code.113 */114 int enable_interrupts(ddf_dev_t *device)115 {116 async_sess_t *parent_sess = devman_parent_device_connect(117 EXCHANGE_SERIALIZE, ddf_dev_get_handle(device), IPC_FLAG_BLOCKING);118 if (!parent_sess)119 return ENOMEM;120 121 const bool enabled = hw_res_enable_interrupt(parent_sess);122 async_hangup(parent_sess);123 124 return enabled ? EOK : EIO;125 }126 127 69 /** Implements BIOS hands-off routine as described in EHCI spec 128 70 * … … 142 84 return ENOMEM; 143 85 86 #define CHECK_RET_HANGUP_RETURN(ret, message...) \ 87 if (ret != EOK) { \ 88 usb_log_error(message); \ 89 async_hangup(parent_sess); \ 90 return ret; \ 91 } else (void)0 92 144 93 /* Read the first EEC. i.e. Legacy Support register */ 145 94 uint32_t usblegsup; 146 int r c= pci_config_space_read_32(parent_sess,95 int ret = pci_config_space_read_32(parent_sess, 147 96 eecp + USBLEGSUP_OFFSET, &usblegsup); 148 if (rc != EOK) { 149 usb_log_error("Failed to read USBLEGSUP: %s.\n", 150 str_error(rc)); 151 goto error; 152 } 153 97 CHECK_RET_HANGUP_RETURN(ret, 98 "Failed to read USBLEGSUP: %s.\n", str_error(ret)); 154 99 usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); 155 100 … … 157 102 * byte. (OS Control semaphore)*/ 158 103 usb_log_debug("Requesting OS control.\n"); 159 r c= pci_config_space_write_8(parent_sess,104 ret = pci_config_space_write_8(parent_sess, 160 105 eecp + USBLEGSUP_OFFSET + 3, 1); 161 if (rc != EOK) { 162 usb_log_error("Failed to request OS EHCI control: %s.\n", 163 str_error(rc)); 164 goto error; 165 } 106 CHECK_RET_HANGUP_RETURN(ret, "Failed to request OS EHCI control: %s.\n", 107 str_error(ret)); 166 108 167 109 size_t wait = 0; 168 110 /* Wait for BIOS to release control. */ 169 r c= pci_config_space_read_32(111 ret = pci_config_space_read_32( 170 112 parent_sess, eecp + USBLEGSUP_OFFSET, &usblegsup); 171 if (rc != EOK) {172 usb_log_error("Failed reading PCI config space: %s.\n",173 str_error(rc));174 goto error;175 }176 177 113 while ((wait < DEFAULT_WAIT) && (usblegsup & USBLEGSUP_BIOS_CONTROL)) { 178 114 async_usleep(WAIT_STEP); 179 r c= pci_config_space_read_32(parent_sess,115 ret = pci_config_space_read_32(parent_sess, 180 116 eecp + USBLEGSUP_OFFSET, &usblegsup); 181 if (rc != EOK) {182 usb_log_error("Failed reading PCI config space: %s.\n",183 str_error(rc));184 goto error;185 }186 117 wait += WAIT_STEP; 187 118 } … … 196 127 usb_log_warning( "BIOS failed to release control after " 197 128 "%zu usecs, force it.\n", wait); 198 r c= pci_config_space_write_32(parent_sess,129 ret = pci_config_space_write_32(parent_sess, 199 130 eecp + USBLEGSUP_OFFSET, USBLEGSUP_OS_CONTROL); 200 if (rc != EOK) { 201 usb_log_error("Failed to force OS control: " 202 "%s.\n", str_error(rc)); 203 goto error; 204 } 205 131 CHECK_RET_HANGUP_RETURN(ret, "Failed to force OS control: " 132 "%s.\n", str_error(ret)); 206 133 /* 207 134 * Check capability type here, value of 01h identifies the capability … … 213 140 /* Read the second EEC Legacy Support and Control register */ 214 141 uint32_t usblegctlsts; 215 r c= pci_config_space_read_32(parent_sess,142 ret = pci_config_space_read_32(parent_sess, 216 143 eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); 217 if (rc != EOK) { 218 usb_log_error("Failed to get USBLEGCTLSTS: %s.\n", 219 str_error(rc)); 220 goto error; 221 } 222 144 CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS: %s.\n", 145 str_error(ret)); 223 146 usb_log_debug("USBLEGCTLSTS: %" PRIx32 ".\n", usblegctlsts); 224 147 /* … … 227 150 * interfering. NOTE: Three upper bits are WC 228 151 */ 229 r c= pci_config_space_write_32(parent_sess,152 ret = pci_config_space_write_32(parent_sess, 230 153 eecp + USBLEGCTLSTS_OFFSET, 0xe0000000); 231 if (rc != EOK) { 232 usb_log_error("Failed(%d) zero USBLEGCTLSTS.\n", rc); 233 goto error; 234 } 235 154 CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) zero USBLEGCTLSTS.\n", ret); 236 155 udelay(10); 237 r c= pci_config_space_read_32(parent_sess,156 ret = pci_config_space_read_32(parent_sess, 238 157 eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts); 239 if (rc != EOK) { 240 usb_log_error("Failed to get USBLEGCTLSTS 2: %s.\n", 241 str_error(rc)); 242 goto error; 243 } 244 158 CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS 2: %s.\n", 159 str_error(ret)); 245 160 usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIx32 ".\n", 246 161 usblegctlsts); … … 248 163 249 164 /* Read again Legacy Support register */ 250 r c= pci_config_space_read_32(parent_sess,165 ret = pci_config_space_read_32(parent_sess, 251 166 eecp + USBLEGSUP_OFFSET, &usblegsup); 252 if (rc != EOK) { 253 usb_log_error("Failed to read USBLEGSUP: %s.\n", 254 str_error(rc)); 255 goto error; 256 } 257 167 CHECK_RET_HANGUP_RETURN(ret, "Failed to read USBLEGSUP: %s.\n", 168 str_error(ret)); 258 169 usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup); 259 170 async_hangup(parent_sess); 260 171 return EOK; 261 error: 262 async_hangup(parent_sess); 263 return rc; 172 #undef CHECK_RET_HANGUP_RETURN 264 173 } 265 174 … … 271 180 /* Map EHCI registers */ 272 181 void *regs = NULL; 273 int r c= pio_enable_range(reg_range, ®s);274 if (r c!= EOK) {182 int ret = pio_enable_range(reg_range, ®s); 183 if (ret != EOK) { 275 184 usb_log_error("Failed to map registers %p: %s.\n", 276 RNGABSPTR(*reg_range), str_error(r c));277 return r c;185 RNGABSPTR(*reg_range), str_error(ret)); 186 return ret; 278 187 } 279 188 … … 290 199 usb_log_debug("Value of EECP: %x.\n", eecp); 291 200 292 r c= disable_extended_caps(device, eecp);293 if (r c!= EOK) {201 ret = disable_extended_caps(device, eecp); 202 if (ret != EOK) { 294 203 usb_log_error("Failed to disable extended capabilities: %s.\n", 295 str_error(rc)); 296 return rc; 297 } 204 str_error(ret)); 205 return ret; 206 } 207 298 208 299 209 /* … … 334 244 usbcmd, *usbcmd, usbsts, *usbsts, usbint, *usbint, usbconf,*usbconf); 335 245 336 return r c;246 return ret; 337 247 } 338 248
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