Changeset 8d2760f in mainline for kernel/genarch/src


Ignore:
Timestamp:
2008-11-29T20:24:47Z (17 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
57e76cb
Parents:
dfd77382
Message:

Add additional members to the irq_t structure so that an interrupt-driven driver
does not need to know how to clear the level interrupt. The z8530 was modified
in this way and is much more generic. The ns16550 driver has also been modified,
but awaits testing. The sparc64 interrupt mapping and dispatch code is now using
the new info and calls the clear-interrupt-routine itself.

Location:
kernel/genarch/src
Files:
5 edited

Legend:

Unmodified
Added
Removed

  • kernel/genarch/src/kbd/ns16550.c

    rdfd77382 r8d2760f  
    108108/** Initialize ns16550.
    109109 *
    110  * @param devno Device number.
    111  * @param inr Interrupt number.
    112  * @param vaddr Virtual address of device's registers.
    113  */
    114 void ns16550_init(devno_t devno, inr_t inr, ioport_t port)
     110 * @param devno         Device number.
     111 * @param port          Virtual/IO address of device's registers.
     112 * @param inr           Interrupt number.
     113 * @param cir           Clear interrupt function.
     114 * @param cir_arg       First argument to cir.
     115 */
     116void
     117ns16550_init(devno_t devno, ioport_t port, inr_t inr, cir_t cir, void *cir_arg)
    115118{
    116119        chardev_initialize("ns16550_kbd", &kbrd, &ops);
    … …  
    125128        ns16550_irq.claim = ns16550_claim;
    126129        ns16550_irq.handler = ns16550_irq_handler;
     130        ns16550_irq.cir = cir;
     131        ns16550_irq.cir_arg = cir_arg;
    127132        irq_register(&ns16550_irq);
    128133       

  • kernel/genarch/src/kbd/z8530.c

    rdfd77382 r8d2760f  
    4444#include <arch/interrupt.h>
    4545#include <arch/drivers/kbd.h>
    46 #include <arch/drivers/fhc.h>
    4746#include <cpu.h>
    4847#include <arch/asm.h>
    … …  
    8483        z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
    8584
    86         z8530_write_a(&z8530, WR1, WR1_IARCSC);         /* interrupt on all characters */
     85        /* interrupt on all characters */
     86        z8530_write_a(&z8530, WR1, WR1_IARCSC);
    8787
    8888        /* 8 bits per character and enable receiver */
    8989        z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
    9090       
    91         z8530_write_a(&z8530, WR9, WR9_MIE);            /* Master Interrupt Enable. */
     91        /* Master Interrupt Enable. */
     92        z8530_write_a(&z8530, WR9, WR9_MIE);
    9293       
    9394        spinlock_lock(&z8530_irq.lock);
    … …  
    109110
    110111/** Initialize z8530. */
    111 void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr)
     112void
     113z8530_init(devno_t devno, uintptr_t vaddr, inr_t inr, cir_t cir, void *cir_arg)
    112114{
    113115        chardev_initialize("z8530_kbd", &kbrd, &ops);
    … …  
    122124        z8530_irq.claim = z8530_claim;
    123125        z8530_irq.handler = z8530_irq_handler;
     126        z8530_irq.cir = cir;
     127        z8530_irq.cir_arg = cir_arg;
    124128        irq_register(&z8530_irq);
    125129
    … …  
    198202void z8530_irq_handler(irq_t *irq, void *arg, ...)
    199203{
    200         /*
    201          * So far, we know we got this interrupt through the FHC.
    202          * Since we don't have enough documentation about the FHC
    203          * and because the interrupt looks like level sensitive,
    204          * we cannot handle it by scheduling one of the level
    205          * interrupt traps. Process the interrupt directly.
    206          */
    207204        if (irq->notif_cfg.notify && irq->notif_cfg.answerbox)
    208205                ipc_irq_send_notif(irq);
    209206        else
    210207                z8530_interrupt();
    211         fhc_clear_interrupt(central_fhc, irq->inr);
    212208}
    213209

  • kernel/genarch/src/ofw/ebus.c

    rdfd77382 r8d2760f  
    4545
    4646/** Apply EBUS ranges to EBUS register. */
    47 bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
     47bool
     48ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa)
    4849{
    4950        ofw_tree_property_t *prop;
    … …  
    6364                if (reg->space != range[i].child_space)
    6465                        continue;
    65                 if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
     66                if (overlaps(reg->addr, reg->size, range[i].child_base,
     67                    range[i].size)) {
    6668                        ofw_pci_reg_t pci_reg;
    6769                       
    6870                        pci_reg.space = range[i].parent_space;
    69                         pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base);
     71                        pci_reg.addr = range[i].parent_base +
     72                            (reg->addr - range[i].child_base);
    7073                        pci_reg.size = reg->size;
    7174                       
    … …  
    7780}
    7881
    79 bool ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr)
     82bool
     83ofw_ebus_map_interrupt(ofw_tree_node_t *node, ofw_ebus_reg_t *reg,
     84    uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
    8085{
    8186        ofw_tree_property_t *prop;
    … …  
    105110        unsigned int i;
    106111        for (i = 0; i < count; i++) {
    107                 if ((intr_map[i].space == space) && (intr_map[i].addr == addr)
    108                         && (intr_map[i].intr == intr))
     112                if ((intr_map[i].space == space) &&
     113                    (intr_map[i].addr == addr) && (intr_map[i].intr == intr))
    109114                        goto found;
    110115        }
    … …  
    114119        /*
    115120         * We found the device that functions as an interrupt controller
    116          * for the interrupt. We also found partial mapping from interrupt to INO.
     121         * for the interrupt. We also found partial mapping from interrupt to
     122         * INO.
    117123         */
    118124
    119         controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle);
     125        controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"),
     126            intr_map[i].controller_handle);
    120127        if (!controller)
    121128                return false;
    … …  
    131138         * Let the PCI do the next step in mapping the interrupt.
    132139         */
    133         if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino, inr))
     140        if (!ofw_pci_map_interrupt(controller, NULL, intr_map[i].controller_ino,
     141            inr, cir, cir_arg))
    134142                return false;
    135143

  • kernel/genarch/src/ofw/fhc.c

    rdfd77382 r8d2760f  
    110110}
    111111
    112 bool ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg, uint32_t interrupt, int *inr)
     112bool
     113ofw_fhc_map_interrupt(ofw_tree_node_t *node, ofw_fhc_reg_t *reg,
     114    uint32_t interrupt, int *inr, cir_t *cir, void **cir_arg)
    113115{
    114116        fhc_t *fhc = NULL;
    … …  
    127129       
    128130        *inr = interrupt;
     131        *cir = fhc_clear_interrupt;
     132        *cir_arg = fhc;
    129133        return true;
    130134}

  • kernel/genarch/src/ofw/pci.c

    rdfd77382 r8d2760f  
    5050#define PCI_IGN                 0x1f
    5151
    52 bool ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
     52bool
     53ofw_pci_apply_ranges(ofw_tree_node_t *node, ofw_pci_reg_t *reg, uintptr_t *pa)
    5354{
    5455        ofw_tree_property_t *prop;
    … …  
    6970       
    7071        for (i = 0; i < ranges; i++) {
    71                 if ((reg->space & PCI_SPACE_MASK) != (range[i].space & PCI_SPACE_MASK))
     72                if ((reg->space & PCI_SPACE_MASK) !=
     73                    (range[i].space & PCI_SPACE_MASK))
    7274                        continue;
    73                 if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) {
    74                         *pa = range[i].parent_base + (reg->addr - range[i].child_base);
     75                if (overlaps(reg->addr, reg->size, range[i].child_base,
     76                    range[i].size)) {
     77                        *pa = range[i].parent_base +
     78                            (reg->addr - range[i].child_base);
    7579                        return true;
    7680                }
    … …  
    8084}
    8185
    82 bool ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg, ofw_pci_reg_t *out)
     86bool
     87ofw_pci_reg_absolutize(ofw_tree_node_t *node, ofw_pci_reg_t *reg,
     88    ofw_pci_reg_t *out)
    8389{
    8490        if (reg->space & PCI_ABS_MASK) {
    … …  
    104110       
    105111        for (i = 0; i < assigned_addresses; i++) {
    106                 if ((assigned_address[i].space & PCI_REG_MASK) == (reg->space & PCI_REG_MASK)) {
     112                if ((assigned_address[i].space & PCI_REG_MASK) ==
     113                    (reg->space & PCI_REG_MASK)) {
    107114                        out->space = assigned_address[i].space;
    108115                        out->addr = reg->addr + assigned_address[i].addr;
    … …  
    120127 * to a PCI bridge.
    121128 */
    122 bool ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino, int *inr)
     129bool
     130ofw_pci_map_interrupt(ofw_tree_node_t *node, ofw_pci_reg_t *reg, int ino,
     131    int *inr, cir_t *cir, void **cir_arg)
    123132{
    124133        pci_t *pci = node->device;
    … …  
    133142
    134143        *inr = (PCI_IGN << IGN_SHIFT) | ino;
     144        *cir = pci_clear_interrupt;
     145        *cir_arg = pci;
    135146
    136147        return true;
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