Index: kernel/arch/ia32xen/include/mm/page.h
===================================================================
--- kernel/arch/ia32xen/include/mm/page.h	(revision d0485c6a1e50e0398bb04d70d1e1ed89ea3db22a)
+++ kernel/arch/ia32xen/include/mm/page.h	(revision 8cd140f26dd9503acc9c3b85b265d95ff017cea4)
@@ -77,17 +77,30 @@
 	mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
 	mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
-	xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \
+	ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
 }
 
 #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
+	mmuext_op_t mmu_ext; \
+	\
+	mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
+	mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
+	ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
+	\
 	mmu_update_t update; \
 	\
 	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
-	update.val = PA2MA(a) | 0x0003; \
-	xen_mmu_update(&update, 1, NULL, DOMID_SELF); \
-}
+	update.val = PA2MA(a); \
+	ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
+}
+
 #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
 #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
-#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)	(((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)
+#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \
+	mmu_update_t update; \
+	\
+	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
+	update.val = PA2MA(a); \
+	ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
+}
 
 #define GET_PTL1_FLAGS_ARCH(ptl0, i)		get_pt_flags((pte_t *) (ptl0), (index_t)(i))
@@ -197,16 +210,22 @@
 static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
 {
-	pte_t *p = &pt[i];
-	
-	p->page_cache_disable = !(flags & PAGE_CACHEABLE);
-	p->present = !(flags & PAGE_NOT_PRESENT);
-	p->uaccessible = (flags & PAGE_USER) != 0;
-	p->writeable = (flags & PAGE_WRITE) != 0;
-	p->global = (flags & PAGE_GLOBAL) != 0;
+	pte_t p = pt[i];
+	
+	p.page_cache_disable = !(flags & PAGE_CACHEABLE);
+	p.present = !(flags & PAGE_NOT_PRESENT);
+	p.uaccessible = (flags & PAGE_USER) != 0;
+	p.writeable = (flags & PAGE_WRITE) != 0;
+	p.global = (flags & PAGE_GLOBAL) != 0;
 	
 	/*
 	 * Ensure that there is at least one bit set even if the present bit is cleared.
 	 */
-	p->soft_valid = true;
+	p.soft_valid = true;
+	
+	mmu_update_t update;
+	
+	update.ptr = PA2MA(KA2PA(&(pt[i])));
+	update.pte = p;
+	xen_mmu_update(&update, 1, NULL, DOMID_SELF);
 }
 
