Changeset 897ad60 in mainline for arch/ia32/src/pm.c

Timestamp:

2006-04-13T16:11:27Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

39cea6a

Parents:

963074b3

Message:

Replace assembly from pm.c with new inline functions defined in asm.h.

File:

• arch/ia32/src/pm.c (modified) (3 diffs)

arch/ia32/src/pm.c

@@ -179 +179 @@
         idtr.limit = sizeof(idt);
         idtr.base = (__address) idt;
-        __asm__ volatile ("lgdt %0\n" : : "m" (gdtr));
-        __asm__ volatile ("lidt %0\n" : : "m" (idtr));  
+        gdtr_load(&gdtr);
+        idtr_load(&idtr);
         
         /*
@@ -214 +214 @@
          * to its own TSS. We just need to load the TR register.
          */
-        __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES)));
+        tr_load(selector(TSS_DES));
         
         clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels */
@@ -225 +225 @@
         struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base;
 
-        __asm__ volatile ("sgdt %0\n" : : "m" (cpugdtr));
-
+        gdtr_store(&cpugdtr);
         gdt_setbase(&gdt_p[TLS_DES], tls);
         /* Reload gdt register to update GS in CPU */
-        __asm__ volatile ("lgdt %0\n" : : "m" (cpugdtr));
-}
+        gdtr_load(&cpugdtr);
+}