Changeset 879585a3 in mainline for kernel/arch/sparc64

Timestamp:

2007-03-31T22:22:50Z (19 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

31d8e10

Parents:

563c2dd

Message:

Simplify synchronization in as_switch().
The function was oversynchronized, which
was causing deadlocks on the address
space mutex.

Now, address spaces can only be switched
when the asidlock is held. This also protects
stealing of ASIDs. No other synchronization
is necessary.

File:

• kernel/arch/sparc64/src/mm/as.c (modified) (4 diffs)

kernel/arch/sparc64/src/mm/as.c

@@ -43 +43 @@
 #include <arch/mm/tsb.h>
 #include <arch/memstr.h>
-#include <synch/mutex.h>
 #include <arch/asm.h>
 #include <mm/frame.h>
@@ -101 +100 @@
 {
 #ifdef CONFIG_TSB
-        ipl_t ipl;
-
-        ipl = interrupts_disable();
-        mutex_lock_active(&as->lock);   /* completely unnecessary, but polite */
         tsb_invalidate(as, 0, (count_t) -1);
-        mutex_unlock(&as->lock);
-        interrupts_restore(ipl);
 #endif
         return 0;
@@ -124 +117 @@
         
         /*
-         * Note that we don't lock the address space.
-         * That's correct - we can afford it here
-         * because we only read members that are
-         * currently read-only.
+         * Note that we don't and may not lock the address space. That's ok
+         * since we only read members that are currently read-only.
+         *
+         * Moreover, the as->asid is protected by asidlock, which is being held.
          */
         
         /*
-         * Write ASID to secondary context register.
-         * The primary context register has to be set
-         * from TL>0 so it will be filled from the
-         * secondary context register from the TL=1
-         * code just before switch to userspace.
+         * Write ASID to secondary context register. The primary context
+         * register has to be set from TL>0 so it will be filled from the
+         * secondary context register from the TL=1 code just before switch to
+         * userspace.
          */
         ctx.v = 0;
@@ -185 +177 @@
 
         /*
-         * Note that we don't lock the address space.
-         * That's correct - we can afford it here
-         * because we only read members that are
-         * currently read-only.
+         * Note that we don't and may not lock the address space. That's ok
+         * since we only read members that are currently read-only.
+         *
+         * Moreover, the as->asid is protected by asidlock, which is being held.
          */