Changeset 8565a42 in mainline for kernel/arch/riscv64/include

Timestamp:

2018-03-02T20:34:50Z (8 years ago)

Author:

GitHub <noreply@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a1a81f69, d5e5fd1

Parents:

3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

git-author:

Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)

git-committer:

GitHub <noreply@…> (2018-03-02 20:34:50)

Message:

Remove all trailing whitespace, everywhere.

See individual commit messages for details.

Location:

kernel/arch/riscv64/include/arch

Files:

• asm.h (modified) (5 diffs)
• atomic.h (modified) (8 diffs)
• cycle.h (modified) (1 diff)
• mm/page.h (modified) (2 diffs)

kernel/arch/riscv64/include/arch/asm.h

@@ -45 +45 @@
 {
         ipl_t ipl;
-        
+
         asm volatile (
                 "csrrsi %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n"
                 : [ipl] "=r" (ipl)
         );
-        
+
         return ipl;
 }
@@ -57 +57 @@
 {
         ipl_t ipl;
-        
+
         asm volatile (
                 "csrrci %[ipl], sstatus, " STRING(SSTATUS_SIE_MASK) "\n"
                 : [ipl] "=r" (ipl)
         );
-        
+
         return ipl;
 }
@@ -77 +77 @@
 {
         ipl_t ipl;
-        
+
         asm volatile (
                 "csrr %[ipl], sstatus\n"
                 : [ipl] "=r" (ipl)
         );
-        
+
         return ipl;
 }
@@ -94 +94 @@
 {
         uintptr_t base;
-        
+
         asm volatile (
                 "and %[base], sp, %[mask]\n"
@@ -100 +100 @@
                 : [mask] "r" (~(STACK_SIZE - 1))
         );
-        
+
         return base;
 }

kernel/arch/riscv64/include/arch/atomic.h

@@ -59 +59 @@
 {
         atomic_count_t orig;
-        
+
         asm volatile (
                 "amoadd.d %[orig], %[inc], %[addr]\n"
@@ -65 +65 @@
                 : [inc] "r" (1)
         );
-        
+
         return orig;
 }
@@ -72 +72 @@
 {
         atomic_count_t orig;
-        
+
         asm volatile (
                 "amoadd.d %[orig], %[inc], %[addr]\n"
@@ -78 +78 @@
                 : [inc] "r" (-1)
         );
-        
+
         return orig;
 }
@@ -85 +85 @@
 {
         atomic_count_t orig;
-        
+
         asm volatile (
                 "amoadd.d %[orig], %[inc], %[addr]\n"
@@ -91 +91 @@
                 : [inc] "r" (1)
         );
-        
+
         return orig - 1;
 }
@@ -98 +98 @@
 {
         atomic_count_t orig;
-        
+
         asm volatile (
                 "amoadd.d %[orig], %[inc], %[addr]\n"
@@ -104 +104 @@
                 : [inc] "r" (-1)
         );
-        
+
         return orig + 1;
 }

kernel/arch/riscv64/include/arch/cycle.h

@@ -41 +41 @@
 {
         uint64_t cycle;
-        
+
         asm volatile (
                 "rdcycle %[cycle]\n"
                 : [cycle] "=r" (cycle)
         );
-        
+
         return cycle;
 }

kernel/arch/riscv64/include/arch/mm/page.h

@@ -182 +182 @@
 {
         pte_t *entry = &pt[i];
-        
+
         return (((!entry->valid) << PAGE_PRESENT_SHIFT) |
             (entry->user << PAGE_USER_SHIFT) |
@@ -194 +194 @@
 {
         pte_t *entry = &pt[i];
-        
+
         entry->valid = !(flags & PAGE_NOT_PRESENT);
         entry->readable = (flags & PAGE_READ) != 0;