Changeset 8565a42 in mainline for kernel/arch/mips32/include


Ignore:
Timestamp:
2018-03-02T20:34:50Z (8 years ago)
Author:
GitHub <noreply@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a1a81f69, d5e5fd1
Parents:
3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
git-author:
Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)
git-committer:
GitHub <noreply@…> (2018-03-02 20:34:50)
Message:

Remove all trailing whitespace, everywhere.

See individual commit messages for details.

Location:
kernel/arch/mips32/include/arch
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/include/arch/asm.h

    r3061bc1 r8565a42  
    5555{
    5656        uintptr_t base;
    57        
     57
    5858        asm volatile (
    5959                "and %[base], $29, %[mask]\n"
     
    6161                : [mask] "r" (~(STACK_SIZE - 1))
    6262        );
    63        
     63
    6464        return base;
    6565}
  • kernel/arch/mips32/include/arch/atomic.h

    r3061bc1 r8565a42  
    6060        atomic_count_t tmp;
    6161        atomic_count_t v;
    62        
     62
    6363        asm volatile (
    6464                "1:\n"
     
    7575                  "i" (0)
    7676        );
    77        
     77
    7878        return v;
    7979}
     
    8383        atomic_count_t tmp;
    8484        atomic_count_t v;
    85        
     85
    8686        asm volatile (
    8787                "1:\n"
     
    9898                : "i" (1)
    9999        );
    100        
     100
    101101        return v;
    102102}
  • kernel/arch/mips32/include/arch/mm/page.h

    r3061bc1 r8565a42  
    165165{
    166166        pte_t *p = &pt[i];
    167        
     167
    168168        return ((p->cacheable << PAGE_CACHEABLE_SHIFT) |
    169169            ((!p->p) << PAGE_PRESENT_SHIFT) |
     
    178178{
    179179        pte_t *p = &pt[i];
    180        
     180
    181181        p->cacheable = (flags & PAGE_CACHEABLE) != 0;
    182182        p->p = !(flags & PAGE_NOT_PRESENT);
    183183        p->g = (flags & PAGE_GLOBAL) != 0;
    184184        p->w = (flags & PAGE_WRITE) != 0;
    185        
     185
    186186        /*
    187187         * Ensure that valid entries have at least one bit set.
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