Index: kernel/arch/mips32/include/arch.h =================================================================== --- kernel/arch/mips32/include/arch.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ARCH_H_ -#define KERN_mips32_ARCH_H_ - -#include - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -extern size_t cpu_count; - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - uint32_t cpumap; - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/arch/arch.h =================================================================== --- kernel/arch/mips32/include/arch/arch.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/arch.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ARCH_H_ +#define KERN_mips32_ARCH_H_ + +#include + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +extern size_t cpu_count; + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + uint32_t cpumap; + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} bootinfo_t; + +extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm.h =================================================================== --- kernel/arch/mips32/include/arch/asm.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/asm.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ASM_H_ +#define KERN_mips32_ASM_H_ + +#include +#include +#include + +NO_TRACE static inline void cpu_sleep(void) +{ + /* + * Unfortunatelly most of the simulators do not support + * + * asm volatile ( + * "wait" + * ); + * + */ +} + +/** Return base address of current stack + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t base; + + asm volatile ( + "and %[base], $29, %[mask]\n" + : [base] "=r" (base) + : [mask] "r" (~(STACK_SIZE - 1)) + ); + + return base; +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t); +extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); + +extern ipl_t interrupts_disable(void); +extern ipl_t interrupts_enable(void); +extern void interrupts_restore(ipl_t); +extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm/boot.h =================================================================== --- kernel/arch/mips32/include/arch/asm/boot.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/asm/boot.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_BOOT_H_ +#define KERN_mips32_BOOT_H_ + +/* Temporary stack size for boot process */ +#define TEMP_STACK_SIZE 0x100 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/asm/regname.h =================================================================== --- kernel/arch/mips32/include/arch/asm/regname.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/asm/regname.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_REGNAME_H_ +#define KERN_mips32_REGNAME_H_ + +#define zero 0 +#define at 1 +#define v0 2 +#define v1 3 +#define a0 4 +#define a1 5 +#define a2 6 +#define a3 7 +#define t0 8 +#define t1 9 +#define t2 10 +#define t3 11 +#define t4 12 +#define t5 13 +#define t6 14 +#define t7 15 +#define s0 16 +#define s1 17 +#define s2 18 +#define s3 19 +#define s4 20 +#define s5 21 +#define s6 22 +#define s7 23 +#define t8 24 +#define t9 25 +#define k0 26 +#define k1 27 +#define gp 28 +#define sp 29 +#define s8 30 +#define ra 31 + +#define rindex 0 +#define rrandom 1 +#define entrylo0 2 +#define entrylo1 3 +#define context 4 +#define pagemask 5 +#define wired 6 +#define badvaddr 8 +#define count 9 +#define entryhi 10 +#define compare 11 +#define status 12 +#define cause 13 +#define epc 14 +#define rconfig 16 +#define lladdr 17 +#define watchlo 18 +#define watchhi 19 +#define xcontext 20 +#define rdebug 23 +#define depc 24 +#define eepc 30 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/atomic.h =================================================================== --- kernel/arch/mips32/include/arch/atomic.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/atomic.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,114 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ATOMIC_H_ +#define KERN_mips32_ATOMIC_H_ + +#include + +#define atomic_inc(x) ((void) atomic_add(x, 1)) +#define atomic_dec(x) ((void) atomic_add(x, -1)) + +#define atomic_postinc(x) (atomic_add(x, 1) - 1) +#define atomic_postdec(x) (atomic_add(x, -1) + 1) + +#define atomic_preinc(x) atomic_add(x, 1) +#define atomic_predec(x) atomic_add(x, -1) + +/* Atomic addition of immediate value. + * + * @param val Memory location to which will be the immediate value added. + * @param i Signed immediate that will be added to *val. + * + * @return Value after addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " ll %0, %1\n" + " addu %0, %0, %3\n" /* same as addi, but never traps on overflow */ + " move %2, %0\n" + " sc %0, %1\n" + " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ + " nop\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "r" (i), + "i" (0) + ); + + return v; +} + +NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) +{ + atomic_count_t tmp; + atomic_count_t v; + + asm volatile ( + "1:\n" + " ll %2, %1\n" + " bnez %2, 2f\n" + " li %0, %3\n" + " sc %0, %1\n" + " beqz %0, 1b\n" + " nop\n" + "2:\n" + : "=&r" (tmp), + "+m" (val->count), + "=&r" (v) + : "i" (1) + ); + + return v; +} + +NO_TRACE static inline void atomic_lock_arch(atomic_t *val) +{ + do { + while (val->count); + } while (test_and_set(val)); +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/barrier.h =================================================================== --- kernel/arch/mips32/include/arch/barrier.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/barrier.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_BARRIER_H_ +#define KERN_mips32_BARRIER_H_ + +/* + * TODO: implement true MIPS memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") + +#define smc_coherence(a) +#define smc_coherence_block(a, l) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cache.h =================================================================== --- kernel/arch/mips32/include/arch/cache.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/cache.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CACHE_H_ +#define KERN_mips32_CACHE_H_ + +#include + +extern void cache_error(istate_t *istate); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/context.h =================================================================== --- kernel/arch/mips32/include/arch/context.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/context.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CONTEXT_H_ +#define KERN_mips32_CONTEXT_H_ + +#include +#include + +/* + * Put one item onto the stack to support get_stack_base() and align it up. + */ +#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#ifndef __ASM__ + +#include + +#define context_set(ctx, pc, stack, size) \ + context_set_generic(ctx, pc, stack, size) + +/* + * Only save registers that must be preserved across + * function calls. + */ +typedef struct { + uintptr_t sp; + uintptr_t pc; + + uint32_t s0; + uint32_t s1; + uint32_t s2; + uint32_t s3; + uint32_t s4; + uint32_t s5; + uint32_t s6; + uint32_t s7; + uint32_t s8; + uint32_t gp; + + ipl_t ipl; +} context_t; + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/context_offset.h =================================================================== --- kernel/arch/mips32/include/arch/context_offset.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/context_offset.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_mips32_CONTEXT_OFFSET_H_ +#define KERN_mips32_CONTEXT_OFFSET_H_ + +#define OFFSET_SP 0x0 +#define OFFSET_PC 0x4 +#define OFFSET_S0 0x8 +#define OFFSET_S1 0xc +#define OFFSET_S2 0x10 +#define OFFSET_S3 0x14 +#define OFFSET_S4 0x18 +#define OFFSET_S5 0x1c +#define OFFSET_S6 0x20 +#define OFFSET_S7 0x24 +#define OFFSET_S8 0x28 +#define OFFSET_GP 0x2c + +#ifdef KERNEL +# define OFFSET_IPL 0x30 +#else +# define OFFSET_TLS 0x30 + +# define OFFSET_F20 0x34 +# define OFFSET_F21 0x38 +# define OFFSET_F22 0x3c +# define OFFSET_F23 0x40 +# define OFFSET_F24 0x44 +# define OFFSET_F25 0x48 +# define OFFSET_F26 0x4c +# define OFFSET_F27 0x50 +# define OFFSET_F28 0x54 +# define OFFSET_F29 0x58 +# define OFFSET_F30 0x5c +#endif /* KERNEL */ + +#ifdef __ASM__ + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_SAVE_ARCH_CORE ctx:req + sw $s0, OFFSET_S0(\ctx) + sw $s1, OFFSET_S1(\ctx) + sw $s2, OFFSET_S2(\ctx) + sw $s3, OFFSET_S3(\ctx) + sw $s4, OFFSET_S4(\ctx) + sw $s5, OFFSET_S5(\ctx) + sw $s6, OFFSET_S6(\ctx) + sw $s7, OFFSET_S7(\ctx) + sw $s8, OFFSET_S8(\ctx) + sw $gp, OFFSET_GP(\ctx) + +#ifndef KERNEL + sw $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + mfc1 $t0, $20 + sw $t0, OFFSET_F20(\ctx) + + mfc1 $t0, $21 + sw $t0, OFFSET_F21(\ctx) + + mfc1 $t0, $22 + sw $t0, OFFSET_F22(\ctx) + + mfc1 $t0, $23 + sw $t0, OFFSET_F23(\ctx) + + mfc1 $t0, $24 + sw $t0, OFFSET_F24(\ctx) + + mfc1 $t0, $25 + sw $t0, OFFSET_F25(\ctx) + + mfc1 $t0, $26 + sw $t0, OFFSET_F26(\ctx) + + mfc1 $t0, $27 + sw $t0, OFFSET_F27(\ctx) + + mfc1 $t0, $28 + sw $t0, OFFSET_F28(\ctx) + + mfc1 $t0, $29 + sw $t0, OFFSET_F29(\ctx) + + mfc1 $t0, $30 + sw $t0, OFFSET_F30(\ctx) +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + sw $ra, OFFSET_PC(\ctx) + sw $sp, OFFSET_SP(\ctx) +.endm + +/* ctx: address of the structure with saved context */ +.macro CONTEXT_RESTORE_ARCH_CORE ctx:req + lw $s0, OFFSET_S0(\ctx) + lw $s1, OFFSET_S1(\ctx) + lw $s2, OFFSET_S2(\ctx) + lw $s3, OFFSET_S3(\ctx) + lw $s4, OFFSET_S4(\ctx) + lw $s5, OFFSET_S5(\ctx) + lw $s6, OFFSET_S6(\ctx) + lw $s7, OFFSET_S7(\ctx) + lw $s8, OFFSET_S8(\ctx) + lw $gp, OFFSET_GP(\ctx) +#ifndef KERNEL + lw $k1, OFFSET_TLS(\ctx) + +#ifdef CONFIG_FPU + lw $t0, OFFSET_F20(\ctx) + mtc1 $t0, $20 + + lw $t0, OFFSET_F21(\ctx) + mtc1 $t0, $21 + + lw $t0, OFFSET_F22(\ctx) + mtc1 $t0, $22 + + lw $t0, OFFSET_F23(\ctx) + mtc1 $t0, $23 + + lw $t0, OFFSET_F24(\ctx) + mtc1 $t0, $24 + + lw $t0, OFFSET_F25(\ctx) + mtc1 $t0, $25 + + lw $t0, OFFSET_F26(\ctx) + mtc1 $t0, $26 + + lw $t0, OFFSET_F27(\ctx) + mtc1 $t0, $27 + + lw $t0, OFFSET_F28(\ctx) + mtc1 $t0, $28 + + lw $t0, OFFSET_F29(\ctx) + mtc1 $t0, $29 + + lw $t0, OFFSET_F30(\ctx) + mtc1 $t0, $30 +#endif /* CONFIG_FPU */ +#endif /* KERNEL */ + + lw $ra, OFFSET_PC(\ctx) + lw $sp, OFFSET_SP(\ctx) +.endm + +#endif /* __ASM__ */ + +#endif Index: kernel/arch/mips32/include/arch/cp0.h =================================================================== --- kernel/arch/mips32/include/arch/cp0.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/cp0.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CP0_H_ +#define KERN_mips32_CP0_H_ + +#define cp0_status_ie_enabled_bit (1 << 0) +#define cp0_status_exl_exception_bit (1 << 1) +#define cp0_status_erl_error_bit (1 << 2) +#define cp0_status_um_bit (1 << 4) +#define cp0_status_bev_bootstrap_bit (1 << 22) +#define cp0_status_fpu_bit (1 << 29) + +#define cp0_status_im_shift 8 +#define cp0_status_im_mask 0xff00 + +#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) +#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) + +#define fpu_cop_id 1 + +/* + * Magic value for use in msim. + */ +#define cp0_compare_value 100000 + +#define cp0_mask_all_int() \ + cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) + +#define cp0_unmask_all_int() \ + cp0_status_write(cp0_status_read() | cp0_status_im_mask) + +#define cp0_mask_int(it) \ + cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) + +#define cp0_unmask_int(it) \ + cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) + +#define GEN_READ_CP0(nm, reg) \ + static inline uint32_t cp0_ ##nm##_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mfc0 %0, $" #reg \ + : "=r"(retval) \ + ); \ + \ + return retval; \ + } + +#define GEN_WRITE_CP0(nm, reg) \ + static inline void cp0_ ##nm##_write(uint32_t val) \ + { \ + asm volatile ( \ + "mtc0 %0, $" #reg \ + :: "r"(val) \ + ); \ + } + +GEN_READ_CP0(index, 0); +GEN_WRITE_CP0(index, 0); + +GEN_READ_CP0(random, 1); + +GEN_READ_CP0(entry_lo0, 2); +GEN_WRITE_CP0(entry_lo0, 2); + +GEN_READ_CP0(entry_lo1, 3); +GEN_WRITE_CP0(entry_lo1, 3); + +GEN_READ_CP0(context, 4); +GEN_WRITE_CP0(context, 4); + +GEN_READ_CP0(pagemask, 5); +GEN_WRITE_CP0(pagemask, 5); + +GEN_READ_CP0(wired, 6); +GEN_WRITE_CP0(wired, 6); + +GEN_READ_CP0(badvaddr, 8); + +GEN_READ_CP0(count, 9); +GEN_WRITE_CP0(count, 9); + +GEN_READ_CP0(entry_hi, 10); +GEN_WRITE_CP0(entry_hi, 10); + +GEN_READ_CP0(compare, 11); +GEN_WRITE_CP0(compare, 11); + +GEN_READ_CP0(status, 12); +GEN_WRITE_CP0(status, 12); + +GEN_READ_CP0(cause, 13); +GEN_WRITE_CP0(cause, 13); + +GEN_READ_CP0(epc, 14); +GEN_WRITE_CP0(epc, 14); + +GEN_READ_CP0(prid, 15); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cpu.h =================================================================== --- kernel/arch/mips32/include/arch/cpu.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/cpu.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CPU_H_ +#define KERN_mips32_CPU_H_ + +#include +#include + +typedef struct { + uint32_t imp_num; + uint32_t rev_num; +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/cycle.h =================================================================== --- kernel/arch/mips32/include/arch/cycle.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/cycle.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_CYCLE_H_ +#define KERN_mips32_CYCLE_H_ + +#include +#include +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/debug.h =================================================================== --- kernel/arch/mips32/include/arch/debug.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/debug.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32debug + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DEBUG_H_ +#define KERN_mips32_DEBUG_H_ + +/** Enter the simulator trace mode */ +#define ___traceon() asm volatile ( "\t.word\t0x39\n"); + +/** Leave the simulator trace mode */ +#define ___traceoff() asm volatile ( "\t.word\t0x3d\n"); + +/** Ask the simulator to dump registers */ +#define ___regview() asm volatile ( "\t.word\t0x37\n"); + +/** Halt the simulator */ +#define ___halt() asm volatile ( "\t.word\t0x28\n"); + +/** Enter the simulator interactive mode */ +#define ___intmode() asm volatile ( "\t.word\t0x29\n"); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/debugger.h =================================================================== --- kernel/arch/mips32/include/arch/debugger.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/debugger.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32debug + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DEBUGGER_H_ +#define KERN_mips32_DEBUGGER_H_ + +#include +#include + +#define BKPOINTS_MAX 10 + +/** Breakpoint was shot */ +#define BKPOINT_INPROG (1 << 0) + +/** One-time breakpoint, mandatory for j/b instructions */ +#define BKPOINT_ONESHOT (1 << 1) + +/** + * Breakpoint is set on the next instruction, so that it + * could be reinstalled on the previous one + */ +#define BKPOINT_REINST (1 << 2) + +/** Call a predefined function */ +#define BKPOINT_FUNCCALL (1 << 3) + + +typedef struct { + uintptr_t address; /**< Breakpoint address */ + sysarg_t instruction; /**< Original instruction */ + sysarg_t nextinstruction; /**< Original instruction following break */ + unsigned int flags; /**< Flags regarding breakpoint */ + size_t counter; + void (*bkfunc)(void *, istate_t *); +} bpinfo_t; + +extern bpinfo_t breakpoints[BKPOINTS_MAX]; + +extern bool is_jump(sysarg_t); + +extern void debugger_init(void); +extern void debugger_bpoint(istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/drivers/msim.h =================================================================== --- kernel/arch/mips32/include/arch/drivers/msim.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/drivers/msim.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2005 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_MSIM_H_ +#define KERN_mips32_MSIM_H_ + +/** Address of devices. */ +#define MSIM_VIDEORAM 0x90000000 +#define MSIM_KBD_ADDRESS 0x90000000 +#define MSIM_KBD_IRQ 2 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/elf.h =================================================================== --- kernel/arch/mips32/include/arch/elf.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/elf.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ELF_H_ +#define KERN_mips32_ELF_H_ + +#define ELF_MACHINE EM_MIPS + +#ifdef __BE__ + #define ELF_DATA_ENCODING ELFDATA2MSB +#else + #define ELF_DATA_ENCODING ELFDATA2LSB +#endif + +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/exception.h =================================================================== --- kernel/arch/mips32/include/arch/exception.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/exception.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_EXCEPTION_H_ +#define KERN_mips32_EXCEPTION_H_ + +#include +#include + +#define EXC_Int 0 +#define EXC_Mod 1 +#define EXC_TLBL 2 +#define EXC_TLBS 3 +#define EXC_AdEL 4 +#define EXC_AdES 5 +#define EXC_IBE 6 +#define EXC_DBE 7 +#define EXC_Sys 8 +#define EXC_Bp 9 +#define EXC_RI 10 +#define EXC_CpU 11 +#define EXC_Ov 12 +#define EXC_Tr 13 +#define EXC_VCEI 14 +#define EXC_FPE 15 +#define EXC_WATCH 23 +#define EXC_VCED 31 + +extern void exception(istate_t *istate); +extern void tlb_refill_entry(void); +extern void exception_entry(void); +extern void cache_error_entry(void); +extern void exception_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/faddr.h =================================================================== --- kernel/arch/mips32/include/arch/faddr.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/faddr.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FADDR_H_ +#define KERN_mips32_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/fpu_context.h =================================================================== --- kernel/arch/mips32/include/arch/fpu_context.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/fpu_context.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FPU_CONTEXT_H_ +#define KERN_mips32_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) + +typedef struct { + sysarg_t dregs[32]; + sysarg_t cregs[32]; +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/interrupt.h =================================================================== --- kernel/arch/mips32/include/arch/interrupt.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/interrupt.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_INTERRUPT_H_ +#define KERN_mips32_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 32 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int + +extern function virtual_timer_fnc; +extern uint32_t count_hi; + +extern void interrupt_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/istate.h =================================================================== --- kernel/arch/mips32/include/arch/istate.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/istate.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,121 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ISTATE_H_ +#define KERN_mips32_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +typedef struct istate { + /* + * The first seven registers are arranged so that the istate structure + * can be used both for exception handlers and for the syscall handler. + */ + uint32_t a0; /* arg1 */ + uint32_t a1; /* arg2 */ + uint32_t a2; /* arg3 */ + uint32_t a3; /* arg4 */ + uint32_t t0; /* arg5 */ + uint32_t t1; /* arg6 */ + uint32_t v0; /* arg7 */ + uint32_t v1; + uint32_t at; + uint32_t t2; + uint32_t t3; + uint32_t t4; + uint32_t t5; + uint32_t t6; + uint32_t t7; + uint32_t s0; + uint32_t s1; + uint32_t s2; + uint32_t s3; + uint32_t s4; + uint32_t s5; + uint32_t s6; + uint32_t s7; + uint32_t t8; + uint32_t t9; + uint32_t kt0; + uint32_t kt1; /* We use it as thread-local pointer */ + uint32_t gp; + uint32_t sp; + uint32_t s8; + uint32_t ra; + + uint32_t lo; + uint32_t hi; + + uint32_t status; /* cp0_status */ + uint32_t epc; /* cp0_epc */ + + uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */ +} istate_t; + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->epc = retaddr; +} + +/** Return true if exception happened while in userspace */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return istate->status & cp0_status_um_bit; +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->epc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->sp; +} + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/as.h =================================================================== --- kernel/arch/mips32/include/arch/mm/as.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/as.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_AS_H_ +#define KERN_mips32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/asid.h =================================================================== --- kernel/arch/mips32/include/arch/mm/asid.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/asid.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_ASID_H_ +#define KERN_mips32_ASID_H_ + +#include + +#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ + +typedef uint8_t asid_t; + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/frame.h =================================================================== --- kernel/arch/mips32/include/arch/mm/frame.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/frame.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_FRAME_H_ +#define KERN_mips32_FRAME_H_ + +#define FRAME_WIDTH 14 /* 16K */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/km.h =================================================================== --- kernel/arch/mips32/include/arch/mm/km.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/km.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_KM_H_ +#define KERN_mips32_KM_H_ + +#include + +#define KM_MIPS32_KSEG0_START UINT32_C(0x80000000) +#define KM_MIPS32_KSEG0_SIZE UINT32_C(0x20000000) + +#define KM_MIPS32_KSSEG_START UINT32_C(0xc0000000) +#define KM_MIPS32_KSSEG_SIZE UINT32_C(0x20000000) + +#define KM_MIPS32_KSEG3_START UINT32_C(0xe0000000) +#define KM_MIPS32_KSEG3_SIZE UINT32_C(0x20000000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/page.h =================================================================== --- kernel/arch/mips32/include/arch/mm/page.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/page.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,207 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_PAGE_H_ +#define KERN_mips32_PAGE_H_ + +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ +# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) +# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) +#else +# define KA2PA(x) ((x) - 0x80000000) +# define PA2KA(x) ((x) + 0x80000000) +#endif + +/* + * Implementation of generic 4-level page table interface. + * + * Page table layout: + * - 32-bit virtual addresses + * - Offset is 14 bits => pages are 16K long + * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore + * 4 bytes long + * - PTE's replace EntryLo v (valid) bit with p (present) bit + * - PTE's use only one bit to distinguish between cacheable and uncacheable + * mappings + * - PTE's define soft_valid field to ensure there is at least one 1 bit even if + * the p bit is cleared + * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) + * and bit A (accessed) + * - PTL0 has 64 entries (6 bits) + * - PTL1 is not used + * - PTL2 is not used + * - PTL3 has 4096 entries (12 bits) + */ + +/* Macros describing number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 64 +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +#define PTL3_ENTRIES_ARCH 4096 + +/* Macros describing size of page tables in each level. */ +#define PTL0_SIZE_ARCH ONE_FRAME +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating entry indices for each level. */ +#define PTL0_INDEX_ARCH(vaddr) ((vaddr) >> 26) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 14) & 0xfff) + +/* Set accessor for PTL0 address. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + (((pte_t *) (ptl0))[(i)].pfn << 12) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + (((pte_t *) (ptl3))[(i)].pfn << 12) + +/* Set PTE address accessors for each level. */ +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Last-level info macros. */ +#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) +#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) +#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) +#define PTE_EXECUTABLE_ARCH(pte) 1 + +#ifndef __ASM__ + +#include +#include + +/** Page Table Entry. */ +typedef struct { + unsigned g : 1; /**< Global bit. */ + unsigned p : 1; /**< Present bit. */ + unsigned d : 1; /**< Dirty bit. */ + unsigned cacheable : 1; /**< Cacheable bit. */ + unsigned : 1; /**< Unused. */ + unsigned soft_valid : 1; /**< Valid content even if not present. */ + unsigned pfn : 24; /**< Physical frame number. */ + unsigned w : 1; /**< Page writable bit. */ + unsigned a : 1; /**< Accessed bit. */ +} pte_t; + + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | + ((!p->p) << PAGE_PRESENT_SHIFT) | + (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | + ((p->w) << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + (p->g << PAGE_GLOBAL_SHIFT)); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *p = &pt[i]; + + p->cacheable = (flags & PAGE_CACHEABLE) != 0; + p->p = !(flags & PAGE_NOT_PRESENT); + p->g = (flags & PAGE_GLOBAL) != 0; + p->w = (flags & PAGE_WRITE) != 0; + + /* + * Ensure that valid entries have at least one bit set. + */ + p->soft_valid = 1; +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *p = &pt[i]; + + p->p = 1; +} + + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/mips32/include/arch/mm/tlb.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/mm/tlb.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TLB_H_ +#define KERN_mips32_TLB_H_ + +#include +#include +#include +#include + +#define TLB_ENTRY_COUNT 48 + +#define TLB_WIRED 1 +#define TLB_KSTACK_WIRED_INDEX 0 + +#define TLB_PAGE_MASK_4K (0x000 << 13) +#define TLB_PAGE_MASK_16K (0x003 << 13) +#define TLB_PAGE_MASK_64K (0x00f << 13) +#define TLB_PAGE_MASK_256K (0x03f << 13) +#define TLB_PAGE_MASK_1M (0x0ff << 13) +#define TLB_PAGE_MASK_4M (0x3ff << 13) +#define TLB_PAGE_MASK_16M (0xfff << 13) + +#define PAGE_UNCACHED 2 +#define PAGE_CACHEABLE_EXC_WRITE 5 + +typedef union { + struct { +#ifdef __BE__ + unsigned : 2; /* zero */ + unsigned pfn : 24; /* frame number */ + unsigned c : 3; /* cache coherency attribute */ + unsigned d : 1; /* dirty/write-protect bit */ + unsigned v : 1; /* valid bit */ + unsigned g : 1; /* global bit */ +#else + unsigned g : 1; /* global bit */ + unsigned v : 1; /* valid bit */ + unsigned d : 1; /* dirty/write-protect bit */ + unsigned c : 3; /* cache coherency attribute */ + unsigned pfn : 24; /* frame number */ + unsigned : 2; /* zero */ +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_lo_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned vpn2 : 19; + unsigned : 5; + unsigned asid : 8; +#else + unsigned asid : 8; + unsigned : 5; + unsigned vpn2 : 19; +#endif + } __attribute__ ((packed)); + uint32_t value; +} entry_hi_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned : 7; + unsigned mask : 12; + unsigned : 13; +#else + unsigned : 13; + unsigned mask : 12; + unsigned : 7; +#endif + } __attribute__ ((packed)); + uint32_t value; +} page_mask_t; + +typedef union { + struct { +#ifdef __BE__ + unsigned p : 1; + unsigned : 25; + unsigned index : 6; +#else + unsigned index : 6; + unsigned : 25; + unsigned p : 1; +#endif + } __attribute__ ((packed)); + uint32_t value; +} tlb_index_t; + +/** Probe TLB for Matching Entry + * + * Probe TLB for Matching Entry. + */ +NO_TRACE static inline void tlbp(void) +{ + asm volatile ("tlbp\n\t"); +} + + +/** Read Indexed TLB Entry + * + * Read Indexed TLB Entry. + */ +NO_TRACE static inline void tlbr(void) +{ + asm volatile ("tlbr\n\t"); +} + +/** Write Indexed TLB Entry + * + * Write Indexed TLB Entry. + */ +NO_TRACE static inline void tlbwi(void) +{ + asm volatile ("tlbwi\n\t"); +} + +/** Write Random TLB Entry + * + * Write Random TLB Entry. + */ +NO_TRACE static inline void tlbwr(void) +{ + asm volatile ("tlbwr\n\t"); +} + +#define tlb_invalidate(asid) tlb_invalidate_asid(asid) + +extern void tlb_invalid(istate_t *istate); +extern void tlb_refill(istate_t *istate); +extern void tlb_modified(istate_t *istate); +extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn); +extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/proc/task.h =================================================================== --- kernel/arch/mips32/include/arch/proc/task.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/proc/task.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TASK_H_ +#define KERN_mips32_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/proc/thread.h =================================================================== --- kernel/arch/mips32/include/arch/proc/thread.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/proc/thread.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32proc + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_THREAD_H_ +#define KERN_mips32_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ + Index: kernel/arch/mips32/include/arch/smp/dorder.h =================================================================== --- kernel/arch/mips32/include/arch/smp/dorder.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/smp/dorder.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2007 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_DORDER_H_ +#define KERN_mips32_DORDER_H_ + +#include + +extern uint32_t dorder_cpuid(void); +extern void dorder_ipi_ack(uint32_t); + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/stack.h =================================================================== --- kernel/arch/mips32/include/arch/stack.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/stack.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_STACK_H_ +#define KERN_mips32_STACK_H_ + +#define STACK_ITEM_SIZE 4 +#define STACK_ALIGNMENT 8 +#define ABI_STACK_FRAME 32 + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/arch/types.h =================================================================== --- kernel/arch/mips32/include/arch/types.h (revision 850235d404a93a3e011befe27ef139ef8e288759) +++ kernel/arch/mips32/include/arch/types.h (revision 850235d404a93a3e011befe27ef139ef8e288759) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup mips32 + * @{ + */ +/** @file + */ + +#ifndef KERN_mips32_TYPES_H_ +#define KERN_mips32_TYPES_H_ + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/mips32/include/asm.h =================================================================== --- kernel/arch/mips32/include/asm.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,117 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ASM_H_ -#define KERN_mips32_ASM_H_ - -#include -#include -#include - -NO_TRACE static inline void cpu_sleep(void) -{ - /* - * Unfortunatelly most of the simulators do not support - * - * asm volatile ( - * "wait" - * ); - * - */ -} - -/** Return base address of current stack - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t base; - - asm volatile ( - "and %[base], $29, %[mask]\n" - : [base] "=r" (base) - : [mask] "r" (~(STACK_SIZE - 1)) - ); - - return base; -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t); -extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); - -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/asm/boot.h =================================================================== --- kernel/arch/mips32/include/asm/boot.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_BOOT_H_ -#define KERN_mips32_BOOT_H_ - -/* Temporary stack size for boot process */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/asm/regname.h =================================================================== --- kernel/arch/mips32/include/asm/regname.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,97 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_REGNAME_H_ -#define KERN_mips32_REGNAME_H_ - -#define zero 0 -#define at 1 -#define v0 2 -#define v1 3 -#define a0 4 -#define a1 5 -#define a2 6 -#define a3 7 -#define t0 8 -#define t1 9 -#define t2 10 -#define t3 11 -#define t4 12 -#define t5 13 -#define t6 14 -#define t7 15 -#define s0 16 -#define s1 17 -#define s2 18 -#define s3 19 -#define s4 20 -#define s5 21 -#define s6 22 -#define s7 23 -#define t8 24 -#define t9 25 -#define k0 26 -#define k1 27 -#define gp 28 -#define sp 29 -#define s8 30 -#define ra 31 - -#define rindex 0 -#define rrandom 1 -#define entrylo0 2 -#define entrylo1 3 -#define context 4 -#define pagemask 5 -#define wired 6 -#define badvaddr 8 -#define count 9 -#define entryhi 10 -#define compare 11 -#define status 12 -#define cause 13 -#define epc 14 -#define rconfig 16 -#define lladdr 17 -#define watchlo 18 -#define watchhi 19 -#define xcontext 20 -#define rdebug 23 -#define depc 24 -#define eepc 30 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/atomic.h =================================================================== --- kernel/arch/mips32/include/atomic.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,114 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ATOMIC_H_ -#define KERN_mips32_ATOMIC_H_ - -#include - -#define atomic_inc(x) ((void) atomic_add(x, 1)) -#define atomic_dec(x) ((void) atomic_add(x, -1)) - -#define atomic_postinc(x) (atomic_add(x, 1) - 1) -#define atomic_postdec(x) (atomic_add(x, -1) + 1) - -#define atomic_preinc(x) atomic_add(x, 1) -#define atomic_predec(x) atomic_add(x, -1) - -/* Atomic addition of immediate value. - * - * @param val Memory location to which will be the immediate value added. - * @param i Signed immediate that will be added to *val. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " ll %0, %1\n" - " addu %0, %0, %3\n" /* same as addi, but never traps on overflow */ - " move %2, %0\n" - " sc %0, %1\n" - " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ - " nop\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "r" (i), - "i" (0) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " ll %2, %1\n" - " bnez %2, 2f\n" - " li %0, %3\n" - " sc %0, %1\n" - " beqz %0, 1b\n" - " nop\n" - "2:\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "i" (1) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/barrier.h =================================================================== --- kernel/arch/mips32/include/barrier.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_BARRIER_H_ -#define KERN_mips32_BARRIER_H_ - -/* - * TODO: implement true MIPS memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") - -#define smc_coherence(a) -#define smc_coherence_block(a, l) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cache.h =================================================================== --- kernel/arch/mips32/include/cache.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CACHE_H_ -#define KERN_mips32_CACHE_H_ - -#include - -extern void cache_error(istate_t *istate); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/context.h =================================================================== --- kernel/arch/mips32/include/context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,80 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CONTEXT_H_ -#define KERN_mips32_CONTEXT_H_ - -#include -#include - -/* - * Put one item onto the stack to support get_stack_base() and align it up. - */ -#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#ifndef __ASM__ - -#include - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t s8; - uint32_t gp; - - ipl_t ipl; -} context_t; - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/context_offset.h =================================================================== --- kernel/arch/mips32/include/context_offset.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,188 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_mips32_CONTEXT_OFFSET_H_ -#define KERN_mips32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x0 -#define OFFSET_PC 0x4 -#define OFFSET_S0 0x8 -#define OFFSET_S1 0xc -#define OFFSET_S2 0x10 -#define OFFSET_S3 0x14 -#define OFFSET_S4 0x18 -#define OFFSET_S5 0x1c -#define OFFSET_S6 0x20 -#define OFFSET_S7 0x24 -#define OFFSET_S8 0x28 -#define OFFSET_GP 0x2c - -#ifdef KERNEL -# define OFFSET_IPL 0x30 -#else -# define OFFSET_TLS 0x30 - -# define OFFSET_F20 0x34 -# define OFFSET_F21 0x38 -# define OFFSET_F22 0x3c -# define OFFSET_F23 0x40 -# define OFFSET_F24 0x44 -# define OFFSET_F25 0x48 -# define OFFSET_F26 0x4c -# define OFFSET_F27 0x50 -# define OFFSET_F28 0x54 -# define OFFSET_F29 0x58 -# define OFFSET_F30 0x5c -#endif /* KERNEL */ - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - sw $s0, OFFSET_S0(\ctx) - sw $s1, OFFSET_S1(\ctx) - sw $s2, OFFSET_S2(\ctx) - sw $s3, OFFSET_S3(\ctx) - sw $s4, OFFSET_S4(\ctx) - sw $s5, OFFSET_S5(\ctx) - sw $s6, OFFSET_S6(\ctx) - sw $s7, OFFSET_S7(\ctx) - sw $s8, OFFSET_S8(\ctx) - sw $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - sw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - mfc1 $t0, $20 - sw $t0, OFFSET_F20(\ctx) - - mfc1 $t0, $21 - sw $t0, OFFSET_F21(\ctx) - - mfc1 $t0, $22 - sw $t0, OFFSET_F22(\ctx) - - mfc1 $t0, $23 - sw $t0, OFFSET_F23(\ctx) - - mfc1 $t0, $24 - sw $t0, OFFSET_F24(\ctx) - - mfc1 $t0, $25 - sw $t0, OFFSET_F25(\ctx) - - mfc1 $t0, $26 - sw $t0, OFFSET_F26(\ctx) - - mfc1 $t0, $27 - sw $t0, OFFSET_F27(\ctx) - - mfc1 $t0, $28 - sw $t0, OFFSET_F28(\ctx) - - mfc1 $t0, $29 - sw $t0, OFFSET_F29(\ctx) - - mfc1 $t0, $30 - sw $t0, OFFSET_F30(\ctx) -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - sw $ra, OFFSET_PC(\ctx) - sw $sp, OFFSET_SP(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - lw $s0, OFFSET_S0(\ctx) - lw $s1, OFFSET_S1(\ctx) - lw $s2, OFFSET_S2(\ctx) - lw $s3, OFFSET_S3(\ctx) - lw $s4, OFFSET_S4(\ctx) - lw $s5, OFFSET_S5(\ctx) - lw $s6, OFFSET_S6(\ctx) - lw $s7, OFFSET_S7(\ctx) - lw $s8, OFFSET_S8(\ctx) - lw $gp, OFFSET_GP(\ctx) -#ifndef KERNEL - lw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - lw $t0, OFFSET_F20(\ctx) - mtc1 $t0, $20 - - lw $t0, OFFSET_F21(\ctx) - mtc1 $t0, $21 - - lw $t0, OFFSET_F22(\ctx) - mtc1 $t0, $22 - - lw $t0, OFFSET_F23(\ctx) - mtc1 $t0, $23 - - lw $t0, OFFSET_F24(\ctx) - mtc1 $t0, $24 - - lw $t0, OFFSET_F25(\ctx) - mtc1 $t0, $25 - - lw $t0, OFFSET_F26(\ctx) - mtc1 $t0, $26 - - lw $t0, OFFSET_F27(\ctx) - mtc1 $t0, $27 - - lw $t0, OFFSET_F28(\ctx) - mtc1 $t0, $28 - - lw $t0, OFFSET_F29(\ctx) - mtc1 $t0, $29 - - lw $t0, OFFSET_F30(\ctx) - mtc1 $t0, $30 -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - lw $ra, OFFSET_PC(\ctx) - lw $sp, OFFSET_SP(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/mips32/include/cp0.h =================================================================== --- kernel/arch/mips32/include/cp0.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,137 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CP0_H_ -#define KERN_mips32_CP0_H_ - -#define cp0_status_ie_enabled_bit (1 << 0) -#define cp0_status_exl_exception_bit (1 << 1) -#define cp0_status_erl_error_bit (1 << 2) -#define cp0_status_um_bit (1 << 4) -#define cp0_status_bev_bootstrap_bit (1 << 22) -#define cp0_status_fpu_bit (1 << 29) - -#define cp0_status_im_shift 8 -#define cp0_status_im_mask 0xff00 - -#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) - -#define fpu_cop_id 1 - -/* - * Magic value for use in msim. - */ -#define cp0_compare_value 100000 - -#define cp0_mask_all_int() \ - cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) - -#define cp0_unmask_all_int() \ - cp0_status_write(cp0_status_read() | cp0_status_im_mask) - -#define cp0_mask_int(it) \ - cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) - -#define cp0_unmask_int(it) \ - cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) - -#define GEN_READ_CP0(nm, reg) \ - static inline uint32_t cp0_ ##nm##_read(void) \ - { \ - uint32_t retval; \ - \ - asm volatile ( \ - "mfc0 %0, $" #reg \ - : "=r"(retval) \ - ); \ - \ - return retval; \ - } - -#define GEN_WRITE_CP0(nm, reg) \ - static inline void cp0_ ##nm##_write(uint32_t val) \ - { \ - asm volatile ( \ - "mtc0 %0, $" #reg \ - :: "r"(val) \ - ); \ - } - -GEN_READ_CP0(index, 0); -GEN_WRITE_CP0(index, 0); - -GEN_READ_CP0(random, 1); - -GEN_READ_CP0(entry_lo0, 2); -GEN_WRITE_CP0(entry_lo0, 2); - -GEN_READ_CP0(entry_lo1, 3); -GEN_WRITE_CP0(entry_lo1, 3); - -GEN_READ_CP0(context, 4); -GEN_WRITE_CP0(context, 4); - -GEN_READ_CP0(pagemask, 5); -GEN_WRITE_CP0(pagemask, 5); - -GEN_READ_CP0(wired, 6); -GEN_WRITE_CP0(wired, 6); - -GEN_READ_CP0(badvaddr, 8); - -GEN_READ_CP0(count, 9); -GEN_WRITE_CP0(count, 9); - -GEN_READ_CP0(entry_hi, 10); -GEN_WRITE_CP0(entry_hi, 10); - -GEN_READ_CP0(compare, 11); -GEN_WRITE_CP0(compare, 11); - -GEN_READ_CP0(status, 12); -GEN_WRITE_CP0(status, 12); - -GEN_READ_CP0(cause, 13); -GEN_WRITE_CP0(cause, 13); - -GEN_READ_CP0(epc, 14); -GEN_WRITE_CP0(epc, 14); - -GEN_READ_CP0(prid, 15); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cpu.h =================================================================== --- kernel/arch/mips32/include/cpu.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CPU_H_ -#define KERN_mips32_CPU_H_ - -#include -#include - -typedef struct { - uint32_t imp_num; - uint32_t rev_num; -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/cycle.h =================================================================== --- kernel/arch/mips32/include/cycle.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_CYCLE_H_ -#define KERN_mips32_CYCLE_H_ - -#include -#include -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/debug.h =================================================================== --- kernel/arch/mips32/include/debug.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32debug - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DEBUG_H_ -#define KERN_mips32_DEBUG_H_ - -/** Enter the simulator trace mode */ -#define ___traceon() asm volatile ( "\t.word\t0x39\n"); - -/** Leave the simulator trace mode */ -#define ___traceoff() asm volatile ( "\t.word\t0x3d\n"); - -/** Ask the simulator to dump registers */ -#define ___regview() asm volatile ( "\t.word\t0x37\n"); - -/** Halt the simulator */ -#define ___halt() asm volatile ( "\t.word\t0x28\n"); - -/** Enter the simulator interactive mode */ -#define ___intmode() asm volatile ( "\t.word\t0x29\n"); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/debugger.h =================================================================== --- kernel/arch/mips32/include/debugger.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32debug - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DEBUGGER_H_ -#define KERN_mips32_DEBUGGER_H_ - -#include -#include - -#define BKPOINTS_MAX 10 - -/** Breakpoint was shot */ -#define BKPOINT_INPROG (1 << 0) - -/** One-time breakpoint, mandatory for j/b instructions */ -#define BKPOINT_ONESHOT (1 << 1) - -/** - * Breakpoint is set on the next instruction, so that it - * could be reinstalled on the previous one - */ -#define BKPOINT_REINST (1 << 2) - -/** Call a predefined function */ -#define BKPOINT_FUNCCALL (1 << 3) - - -typedef struct { - uintptr_t address; /**< Breakpoint address */ - sysarg_t instruction; /**< Original instruction */ - sysarg_t nextinstruction; /**< Original instruction following break */ - unsigned int flags; /**< Flags regarding breakpoint */ - size_t counter; - void (*bkfunc)(void *, istate_t *); -} bpinfo_t; - -extern bpinfo_t breakpoints[BKPOINTS_MAX]; - -extern bool is_jump(sysarg_t); - -extern void debugger_init(void); -extern void debugger_bpoint(istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/drivers/msim.h =================================================================== --- kernel/arch/mips32/include/drivers/msim.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_MSIM_H_ -#define KERN_mips32_MSIM_H_ - -/** Address of devices. */ -#define MSIM_VIDEORAM 0x90000000 -#define MSIM_KBD_ADDRESS 0x90000000 -#define MSIM_KBD_IRQ 2 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/elf.h =================================================================== --- kernel/arch/mips32/include/elf.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ELF_H_ -#define KERN_mips32_ELF_H_ - -#define ELF_MACHINE EM_MIPS - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/exception.h =================================================================== --- kernel/arch/mips32/include/exception.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,69 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_EXCEPTION_H_ -#define KERN_mips32_EXCEPTION_H_ - -#include -#include - -#define EXC_Int 0 -#define EXC_Mod 1 -#define EXC_TLBL 2 -#define EXC_TLBS 3 -#define EXC_AdEL 4 -#define EXC_AdES 5 -#define EXC_IBE 6 -#define EXC_DBE 7 -#define EXC_Sys 8 -#define EXC_Bp 9 -#define EXC_RI 10 -#define EXC_CpU 11 -#define EXC_Ov 12 -#define EXC_Tr 13 -#define EXC_VCEI 14 -#define EXC_FPE 15 -#define EXC_WATCH 23 -#define EXC_VCED 31 - -extern void exception(istate_t *istate); -extern void tlb_refill_entry(void); -extern void exception_entry(void); -extern void cache_error_entry(void); -extern void exception_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/faddr.h =================================================================== --- kernel/arch/mips32/include/faddr.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FADDR_H_ -#define KERN_mips32_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/fpu_context.h =================================================================== --- kernel/arch/mips32/include/fpu_context.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FPU_CONTEXT_H_ -#define KERN_mips32_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) - -typedef struct { - sysarg_t dregs[32]; - sysarg_t cregs[32]; -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/interrupt.h =================================================================== --- kernel/arch/mips32/include/interrupt.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_INTERRUPT_H_ -#define KERN_mips32_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 32 -#define IVT_FIRST 0 - -#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int - -extern function virtual_timer_fnc; -extern uint32_t count_hi; - -extern void interrupt_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/istate.h =================================================================== --- kernel/arch/mips32/include/istate.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,121 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32interrupt - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ISTATE_H_ -#define KERN_mips32_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - /* - * The first seven registers are arranged so that the istate structure - * can be used both for exception handlers and for the syscall handler. - */ - uint32_t a0; /* arg1 */ - uint32_t a1; /* arg2 */ - uint32_t a2; /* arg3 */ - uint32_t a3; /* arg4 */ - uint32_t t0; /* arg5 */ - uint32_t t1; /* arg6 */ - uint32_t v0; /* arg7 */ - uint32_t v1; - uint32_t at; - uint32_t t2; - uint32_t t3; - uint32_t t4; - uint32_t t5; - uint32_t t6; - uint32_t t7; - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t t8; - uint32_t t9; - uint32_t kt0; - uint32_t kt1; /* We use it as thread-local pointer */ - uint32_t gp; - uint32_t sp; - uint32_t s8; - uint32_t ra; - - uint32_t lo; - uint32_t hi; - - uint32_t status; /* cp0_status */ - uint32_t epc; /* cp0_epc */ - - uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */ -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->epc = retaddr; -} - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return istate->status & cp0_status_um_bit; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->epc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/as.h =================================================================== --- kernel/arch/mips32/include/mm/as.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_AS_H_ -#define KERN_mips32_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/asid.h =================================================================== --- kernel/arch/mips32/include/mm/asid.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_ASID_H_ -#define KERN_mips32_ASID_H_ - -#include - -#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ - -typedef uint8_t asid_t; - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/frame.h =================================================================== --- kernel/arch/mips32/include/mm/frame.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_FRAME_H_ -#define KERN_mips32_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/km.h =================================================================== --- kernel/arch/mips32/include/mm/km.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_KM_H_ -#define KERN_mips32_KM_H_ - -#include - -#define KM_MIPS32_KSEG0_START UINT32_C(0x80000000) -#define KM_MIPS32_KSEG0_SIZE UINT32_C(0x20000000) - -#define KM_MIPS32_KSSEG_START UINT32_C(0xc0000000) -#define KM_MIPS32_KSSEG_SIZE UINT32_C(0x20000000) - -#define KM_MIPS32_KSEG3_START UINT32_C(0xe0000000) -#define KM_MIPS32_KSEG3_SIZE UINT32_C(0x20000000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/page.h =================================================================== --- kernel/arch/mips32/include/mm/page.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,207 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_PAGE_H_ -#define KERN_mips32_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ -# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) -# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) -#else -# define KA2PA(x) ((x) - 0x80000000) -# define PA2KA(x) ((x) + 0x80000000) -#endif - -/* - * Implementation of generic 4-level page table interface. - * - * Page table layout: - * - 32-bit virtual addresses - * - Offset is 14 bits => pages are 16K long - * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore - * 4 bytes long - * - PTE's replace EntryLo v (valid) bit with p (present) bit - * - PTE's use only one bit to distinguish between cacheable and uncacheable - * mappings - * - PTE's define soft_valid field to ensure there is at least one 1 bit even if - * the p bit is cleared - * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) - * and bit A (accessed) - * - PTL0 has 64 entries (6 bits) - * - PTL1 is not used - * - PTL2 is not used - * - PTL3 has 4096 entries (12 bits) - */ - -/* Macros describing number of entries in each level. */ -#define PTL0_ENTRIES_ARCH 64 -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -#define PTL3_ENTRIES_ARCH 4096 - -/* Macros describing size of page tables in each level. */ -#define PTL0_SIZE_ARCH ONE_FRAME -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating entry indices for each level. */ -#define PTL0_INDEX_ARCH(vaddr) ((vaddr) >> 26) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 14) & 0xfff) - -/* Set accessor for PTL0 address. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - (((pte_t *) (ptl0))[(i)].pfn << 12) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - (((pte_t *) (ptl3))[(i)].pfn << 12) - -/* Set PTE address accessors for each level. */ -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_present((pte_t *) (ptl3), (size_t) (i)) - -/* Last-level info macros. */ -#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0) -#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12) -#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0) -#define PTE_EXECUTABLE_ARCH(pte) 1 - -#ifndef __ASM__ - -#include -#include - -/** Page Table Entry. */ -typedef struct { - unsigned g : 1; /**< Global bit. */ - unsigned p : 1; /**< Present bit. */ - unsigned d : 1; /**< Dirty bit. */ - unsigned cacheable : 1; /**< Cacheable bit. */ - unsigned : 1; /**< Unused. */ - unsigned soft_valid : 1; /**< Valid content even if not present. */ - unsigned pfn : 24; /**< Physical frame number. */ - unsigned w : 1; /**< Page writable bit. */ - unsigned a : 1; /**< Accessed bit. */ -} pte_t; - - -NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - return ((p->cacheable << PAGE_CACHEABLE_SHIFT) | - ((!p->p) << PAGE_PRESENT_SHIFT) | - (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | - ((p->w) << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - (p->g << PAGE_GLOBAL_SHIFT)); -} - -NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) -{ - pte_t *p = &pt[i]; - - p->cacheable = (flags & PAGE_CACHEABLE) != 0; - p->p = !(flags & PAGE_NOT_PRESENT); - p->g = (flags & PAGE_GLOBAL) != 0; - p->w = (flags & PAGE_WRITE) != 0; - - /* - * Ensure that valid entries have at least one bit set. - */ - p->soft_valid = 1; -} - -NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) -{ - pte_t *p = &pt[i]; - - p->p = 1; -} - - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/mm/tlb.h =================================================================== --- kernel/arch/mips32/include/mm/tlb.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,173 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TLB_H_ -#define KERN_mips32_TLB_H_ - -#include -#include -#include -#include - -#define TLB_ENTRY_COUNT 48 - -#define TLB_WIRED 1 -#define TLB_KSTACK_WIRED_INDEX 0 - -#define TLB_PAGE_MASK_4K (0x000 << 13) -#define TLB_PAGE_MASK_16K (0x003 << 13) -#define TLB_PAGE_MASK_64K (0x00f << 13) -#define TLB_PAGE_MASK_256K (0x03f << 13) -#define TLB_PAGE_MASK_1M (0x0ff << 13) -#define TLB_PAGE_MASK_4M (0x3ff << 13) -#define TLB_PAGE_MASK_16M (0xfff << 13) - -#define PAGE_UNCACHED 2 -#define PAGE_CACHEABLE_EXC_WRITE 5 - -typedef union { - struct { -#ifdef __BE__ - unsigned : 2; /* zero */ - unsigned pfn : 24; /* frame number */ - unsigned c : 3; /* cache coherency attribute */ - unsigned d : 1; /* dirty/write-protect bit */ - unsigned v : 1; /* valid bit */ - unsigned g : 1; /* global bit */ -#else - unsigned g : 1; /* global bit */ - unsigned v : 1; /* valid bit */ - unsigned d : 1; /* dirty/write-protect bit */ - unsigned c : 3; /* cache coherency attribute */ - unsigned pfn : 24; /* frame number */ - unsigned : 2; /* zero */ -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_lo_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned vpn2 : 19; - unsigned : 5; - unsigned asid : 8; -#else - unsigned asid : 8; - unsigned : 5; - unsigned vpn2 : 19; -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_hi_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned : 7; - unsigned mask : 12; - unsigned : 13; -#else - unsigned : 13; - unsigned mask : 12; - unsigned : 7; -#endif - } __attribute__ ((packed)); - uint32_t value; -} page_mask_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned p : 1; - unsigned : 25; - unsigned index : 6; -#else - unsigned index : 6; - unsigned : 25; - unsigned p : 1; -#endif - } __attribute__ ((packed)); - uint32_t value; -} tlb_index_t; - -/** Probe TLB for Matching Entry - * - * Probe TLB for Matching Entry. - */ -NO_TRACE static inline void tlbp(void) -{ - asm volatile ("tlbp\n\t"); -} - - -/** Read Indexed TLB Entry - * - * Read Indexed TLB Entry. - */ -NO_TRACE static inline void tlbr(void) -{ - asm volatile ("tlbr\n\t"); -} - -/** Write Indexed TLB Entry - * - * Write Indexed TLB Entry. - */ -NO_TRACE static inline void tlbwi(void) -{ - asm volatile ("tlbwi\n\t"); -} - -/** Write Random TLB Entry - * - * Write Random TLB Entry. - */ -NO_TRACE static inline void tlbwr(void) -{ - asm volatile ("tlbwr\n\t"); -} - -#define tlb_invalidate(asid) tlb_invalidate_asid(asid) - -extern void tlb_invalid(istate_t *istate); -extern void tlb_refill(istate_t *istate); -extern void tlb_modified(istate_t *istate); -extern void tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn); -extern void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/proc/task.h =================================================================== --- kernel/arch/mips32/include/proc/task.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TASK_H_ -#define KERN_mips32_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/proc/thread.h =================================================================== --- kernel/arch/mips32/include/proc/thread.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_THREAD_H_ -#define KERN_mips32_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ - Index: kernel/arch/mips32/include/smp/dorder.h =================================================================== --- kernel/arch/mips32/include/smp/dorder.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2007 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_DORDER_H_ -#define KERN_mips32_DORDER_H_ - -#include - -extern uint32_t dorder_cpuid(void); -extern void dorder_ipi_ack(uint32_t); - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/stack.h =================================================================== --- kernel/arch/mips32/include/stack.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_STACK_H_ -#define KERN_mips32_STACK_H_ - -#define STACK_ITEM_SIZE 4 -#define STACK_ALIGNMENT 8 -#define ABI_STACK_FRAME 32 - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/types.h =================================================================== --- kernel/arch/mips32/include/types.h (revision 2277e03b97a6950736870a381ad825874af27449) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips32_TYPES_H_ -#define KERN_mips32_TYPES_H_ - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */