Changeset 849386a in mainline for arch/ia64/src
- Timestamp:
- 2006-01-27T16:23:40Z (19 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 457d18a
- Parents:
- c2b95d3
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
arch/ia64/src/mm/page.c
rc2b95d3 r849386a 39 39 #include <arch/asm.h> 40 40 #include <arch/barrier.h> 41 #include <memstr.h> 41 42 42 43 /** Initialize VHPT and region registers. */ … … 67 68 68 69 rr.word == rr_read(i); 70 rr.map.ve = 0; /* disable VHPT walker */ 69 71 rr.map.rid = ASID_INVALID; 70 72 rr_write(i, rr.word); … … 77 79 */ 78 80 page_ht = (pte_t *) frame_alloc(FRAME_KA, VHPT_WIDTH - FRAME_WIDTH, NULL); 79 ht_invalidate_all(); 81 memsetb((__address) page_ht, VHPT_SIZE, 0); 82 ht_invalidate_all(); 80 83 81 84 /* … … 99 102 set_vhpt_environment(); 100 103 } 104 105 /** Calculate address of collision chain from VPN and ASID. 106 * 107 * This is rather non-trivial function. 108 * First, it has to translate ASID to RID. 109 * This is achieved by taking VRN bits of 110 * page into account. 111 * Second, it must preserve the region register 112 * it writes the RID to. 113 * 114 * @param page Address of virtual page including VRN bits. 115 * @param asid Address space identifier. 116 * 117 * @return Head of VHPT collision chain for page and asid. 118 */ 119 pte_t *vhpt_hash(__address page, asid_t asid) 120 { 121 region_register rr_save, rr; 122 pte_t *t; 123 124 rr_save.word = rr_read(VRN_WORK); 125 rr.word = rr_save.word; 126 if ((page >> VRN_SHIFT) != VRN_KERNEL) 127 rr.map.rid = (asid * RIDS_PER_ASID) + (page >> VRN_SHIFT); 128 else 129 rr.map.rid = ASID_KERNEL; 130 rr_write(VRN_WORK, rr.word); 131 srlz_i(); 132 t = (pte_t *) thash((VRN_WORK << VRN_SHIFT) | (~(VRN_MASK) & page)); 133 rr_write(VRN_WORK, rr_save.word); 134 srlz_i(); 135 srlz_d(); 136 137 return t; 138 }
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