Changes in kernel/arch/arm32/src/cpu/cpu.c [65871bb:8316547f] in mainline
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kernel/arch/arm32/src/cpu/cpu.c
r65871bb r8316547f 39 39 #include <print.h> 40 40 41 /** Implementers (vendor) names */ 42 static const char * implementer(unsigned id) 43 { 44 switch (id) 45 { 46 case 0x41: return "ARM Limited"; 47 case 0x44: return "Digital Equipment Corporation"; 48 case 0x4d: return "Motorola, Freescale Semiconductor Inc."; 49 case 0x51: return "Qualcomm Inc."; 50 case 0x56: return "Marvell Semiconductor Inc."; 51 case 0x69: return "Intel Corporation"; 52 } 53 return "Unknown implementer"; 54 } 41 /** Number of indexes left out in the #imp_data array */ 42 #define IMP_DATA_START_OFFSET 0x40 43 44 /** Implementators (vendor) names */ 45 static const char *imp_data[] = { 46 "?", /* IMP_DATA_START_OFFSET */ 47 "ARM Limited", /* 0x41 */ 48 "", "", /* 0x42 - 0x43 */ 49 "Digital Equipment Corporation", /* 0x44 */ 50 "", "", "", "", "", "", "", "", /* 0x45 - 0x4c */ 51 "Motorola, Freescale Semicondutor Inc.", /* 0x4d */ 52 "", "", "", /* 0x4e - 0x50 */ 53 "Qualcomm Inc.", /* 0x51 */ 54 "", "", "", "", /* 0x52 - 0x55 */ 55 "Marvell Semiconductor", /* 0x56 */ 56 "", "", "", "", "", "", "", "", "", "", /* 0x57 - 0x60 */ 57 "", "", "", "", "", "", "", "", /* 0x61 - 0x68 */ 58 "Intel Corporation" /* 0x69 */ 59 }; 60 61 /** Length of the #imp_data array */ 62 static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *); 55 63 56 64 /** Architecture names */ 57 static const char * architecture_string(cpu_arch_t *arch) 58 { 59 static const char *arch_data[] = { 60 "ARM", /* 0x0 */ 61 "ARMv4", /* 0x1 */ 62 "ARMv4T", /* 0x2 */ 63 "ARMv5", /* 0x3 */ 64 "ARMv5T", /* 0x4 */ 65 "ARMv5TE", /* 0x5 */ 66 "ARMv5TEJ", /* 0x6 */ 67 "ARMv6" /* 0x7 */ 68 }; 69 if (arch->arch_num < (sizeof(arch_data) / sizeof(arch_data[0]))) 70 return arch_data[arch->arch_num]; 71 else 72 return arch_data[0]; 73 } 65 static const char *arch_data[] = { 66 "?", /* 0x0 */ 67 "4", /* 0x1 */ 68 "4T", /* 0x2 */ 69 "5", /* 0x3 */ 70 "5T", /* 0x4 */ 71 "5TE", /* 0x5 */ 72 "5TEJ", /* 0x6 */ 73 "6" /* 0x7 */ 74 }; 75 76 /** Length of the #arch_data array */ 77 static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *); 74 78 75 79 76 80 /** Retrieves processor identification from CP15 register 0. 77 * 81 * 78 82 * @param cpu Structure for storing CPU identification. 79 * See page B4-1630 of ARM Architecture Reference Manual.80 83 */ 81 84 static void arch_cpu_identify(cpu_arch_t *cpu) … … 92 95 cpu->prim_part_num = (ident << 16) >> 20; 93 96 cpu->rev_num = (ident << 28) >> 28; 94 // TODO CPUs with arch_num == 0xf use CPUID scheme for identification95 97 } 96 98 … … 134 136 ); 135 137 #endif 136 #ifdef CONFIG_FPU137 fpu_setup();138 #endif139 138 } 140 139 … … 148 147 void cpu_print_report(cpu_t *m) 149 148 { 150 printf("cpu%d: vendor=%s, architecture=%s, part number=%x, " 149 const char *vendor = imp_data[0]; 150 const char *architecture = arch_data[0]; 151 cpu_arch_t * cpu_arch = &m->arch; 152 153 const unsigned imp_offset = cpu_arch->imp_num - IMP_DATA_START_OFFSET; 154 155 if (imp_offset < imp_data_length) { 156 vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET]; 157 } 158 159 // TODO CPUs with arch_num == 0xf use CPUID scheme for identification 160 if (cpu_arch->arch_num < arch_data_length) { 161 architecture = arch_data[cpu_arch->arch_num]; 162 } 163 164 printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, " 151 165 "variant=%x, revision=%x\n", 152 m->id, implementer(m->arch.imp_num), 153 architecture_string(&m->arch), m->arch.prim_part_num, 154 m->arch.variant_num, m->arch.rev_num); 166 m->id, vendor, architecture, cpu_arch->prim_part_num, 167 cpu_arch->variant_num, cpu_arch->rev_num); 155 168 } 156 169
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