Changeset 8262010 in mainline for arch/ia32

Timestamp:

2005-04-10T16:36:45Z (21 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

23c0c08

Parents:

43114c5

Message:

Switch from mm-based 'the' mechanism to macro-based 'cpu_private_data[CPU_ID_ARCH]' mechanism.
Added l_apic_id() and some other minor APIC changes.
Move gdtr to K_DATA_START section.
Move K_DATA_START section immediately behind K_TEXT_START section so that real-mode addresses work even with growing size of kernel code.

Location:

arch/ia32

Files:

• Makefile.inc (modified) (1 diff)
• _link.ld (modified) (2 diffs)
• boot/boot.ld (modified) (1 diff)
• include/cpu.h (modified) (1 diff)
• include/smp/apic.h (modified) (2 diffs)
• src/cpu/cpu.c (modified) (1 diff)
• src/pm.c (modified) (1 diff)
• src/smp/apic.c (modified) (6 diffs)

arch/ia32/Makefile.inc

@@ -14 +14 @@
 
 CPPFLAGS=$(DEFS) -nostdinc -I../include
-CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Wmissing-prototypes -Werror -O3
+CFLAGS=$(CPPFLAGS) -nostdlib -fno-builtin -fomit-frame-pointer -Wmissing-prototypes -Werror -O1
 LFLAGS=-M -no-check-sections -T ../arch/ia32/_link.ld
 

arch/ia32/_link.ld

@@ -14 +14 @@
         ktext_start = .;
         *(K_TEXT_START);
+        delta_start = .;
+        *(K_DATA_START);
+        delta_end = .;                  
         *(.text);
         ktext_end = .;
 
         kdata_start = .;
-        *(K_DATA_START);
         *(.data);               /* initialized data */
         *(.rodata*);            /* string literals */
@@ -29 +31 @@
     . = ABSOLUTE(hardcoded_ktext_size);
     .patch_1 : {
-        LONG(ktext_end - ktext_start);
+        LONG(ktext_end - ktext_start - (delta_end - delta_start));
     }
 
     . = ABSOLUTE(hardcoded_kdata_size);
     .patch_2 : {
-        LONG(kdata_end - kdata_start);
+        LONG(kdata_end - kdata_start + (delta_end - delta_start));
     }
 

arch/ia32/boot/boot.ld

@@ +1 @@
+OUTPUT_FORMAT(binary)
+ENTRY(main)
 SECTIONS {
     .text 0x7c00 : AT (0x0) { *(.text) }

arch/ia32/include/cpu.h

@@ -30 +30 @@
 #define __ia32_CPU_H__
 
+#include <config.h>
 #include <typedefs.h>
 #include <arch/pm.h>
+
+#ifdef __SMP__
+#define CPU_ID_ARCH     (config.cpu_count>1?l_apic_id():0)
+#else
+#define CPU_ID_ARCH     (0)
+#endif
 
 struct cpu_arch {

arch/ia32/include/smp/apic.h

@@ -96 +96 @@
 #define L_APIC_ID       (0x020/sizeof(__u32))
 #define L_APIC_IDClear  (~(0xf<<24))
+#define L_APIC_IDShift  24
+#define L_APIC_IDMask   0xf
 
 /* IO APIC */
@@ -121 +123 @@
 extern void l_apic_debug(void);
 extern void l_apic_timer_interrupt(__u8 n, __u32 stack[]);
+extern __u8 l_apic_id(void);
 
 extern __u32 io_apic_read(__u8 address);

arch/ia32/src/cpu/cpu.c

@@ -35 +35 @@
 #include <print.h>
 #include <typedefs.h>
+
+#include <arch/smp/apic.h>
 
 /*

arch/ia32/src/pm.c

@@ -67 +67 @@
 
 /* gdtr changes everytime new CPU is initialized */
-struct ptr_16_32 gdtr = { .limit = sizeof(gdt), .base = (__address) gdt };
+struct ptr_16_32 gdtr __attribute__ ((section ("K_DATA_START"))) = { .limit = sizeof(gdt), .base = (__address) gdt };
 struct ptr_16_32 idtr = { .limit = sizeof(idt), .base = (__address) idt };
 

arch/ia32/src/smp/apic.c

@@ -27 +27 @@
  */
 
-#ifdef __SMP__
-
 #include <arch/types.h>
 #include <arch/smp/apic.h>
@@ -39 +37 @@
 #include <arch/asm.h>
 #include <arch.h>
+
+#ifdef __SMP__
 
 /*
@@ -222 +222 @@
 {
         __u32 tmp, t1, t2;
-        
+        int cpu_id = config.cpu_active - 1;
+        
+
+        /*
+         * Here we set local APIC ID's so that they match operating system's CPU ID's
+         * This operation is dangerous as it is model specific.
+         * TODO: some care should be taken.
+         * NOTE: CPU may not be used to define APIC ID
+         */
+        if (l_apic_id() != cpu_id) {
+                l_apic[L_APIC_ID] &= L_APIC_IDClear;
+                l_apic[L_APIC_ID] |= (l_apic[L_APIC_ID]&L_APIC_IDClear)|((cpu_id)<<L_APIC_IDShift);
+        }
 
         l_apic[LVT_Err] |= (1<<16);
@@ -271 +283 @@
         int i, lint;
 
-        printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, (l_apic[L_APIC_ID] >> 24)&0xf);
+        printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, l_apic_id());
 
         printf("LVT_Tm: ");
@@ -305 +317 @@
          * This register is supported only on P6 and higher.
          */
-        if (CPU->family > 5) {
+        if (CPU->arch.family > 5) {
                 printf("LVT_PCINT: ");
                 if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(',');
@@ -324 +336 @@
         l_apic_eoi();
         clock();
+}
+
+__u8 l_apic_id(void)
+{
+        return (l_apic[L_APIC_ID] >> L_APIC_IDShift)&L_APIC_IDMask;
 }